6#include <zephyr/drivers/spi.h>
10class ZephyrSPIDelegate;
18 this->
idle_cfg_.operation = SPI_OP_MODE_MASTER | SPI_WORD_SET(8);
21 bool is_hw()
override {
return true; }
24 bool release_device,
bool write_only)
override;
44 uint8_t
transfer(uint8_t data)
override;
45 void transfer(
const uint8_t *txbuf, uint8_t *rxbuf,
size_t length)
override;
BedjetMode mode
BedJet operating mode.
const ZephyrSPIDelegate * active_
ZephyrSPIBus(const device *dev)
static constexpr uint32_t IDLE_FREQUENCY
SPIDelegate * get_delegate(uint32_t data_rate, SPIBitOrder bit_order, SPIMode mode, GPIOPin *cs_pin, bool release_device, bool write_only) override
void write_array16(const uint16_t *data, size_t length) override
void read_array(uint8_t *ptr, size_t length) override
ZephyrSPIDelegate(ZephyrSPIBus *bus, uint32_t data_rate, SPIBitOrder bit_order, SPIMode mode, GPIOPin *cs_pin)
void begin_transaction() override
void transceive_(const uint8_t *tx, uint8_t *rx, size_t length)
One spi_transceive; rx (if given) is zeroed when the transfer fails.
void write_array(const uint8_t *ptr, size_t length) override
uint8_t transfer(uint8_t data) override
~ZephyrSPIDelegate() override
Implementation of SPI Controller mode.
SPIMode
Modes mapping to clock phase and polarity.
SPIBitOrder
The bit-order for SPI devices. This defines how the data read from and written to the device is inter...