ESPHome 2026.10.0-dev
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spi.h
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1#pragma once
4#include "esphome/core/hal.h"
5#include "esphome/core/log.h"
6#include <map>
7#include <utility>
8#include <vector>
9
10#ifdef USE_ESP32
11
12#include "driver/spi_master.h"
13
14using SPIInterface = spi_host_device_t;
15
16#elif defined(USE_ARDUINO) && !defined(USE_LIBRETINY)
17
18#include <SPI.h>
19
20#ifdef USE_RP2
21using SPIInterface = SPIClassRP2040 *;
22#else
23using SPIInterface = SPIClass *;
24#endif
25
26#elif defined(USE_HOST) || defined(CLANG_TIDY)
27
28using SPIInterface = void *; // Stub for platforms without SPI (e.g., host, Zephyr)
29
30#endif // USE_ESP32 / USE_ARDUINO
31
35namespace esphome::spi {
36
37#define LOG_SPI_DEVICE(this) ESP_LOGCONFIG(TAG, " CS Pin: %d", esphome::spi::Utility::get_pin_no(this->cs_));
38
72
78enum SPIMode {
79 MODE0 = 0,
80 MODE1 = 1,
81 MODE2 = 2,
82 MODE3 = 3,
83};
93 DATA_RATE_1MHZ = 1000000,
94 DATA_RATE_2MHZ = 2000000,
95 DATA_RATE_4MHZ = 4000000,
96 DATA_RATE_5MHZ = 5000000,
97 DATA_RATE_8MHZ = 8000000,
98 DATA_RATE_10MHZ = 10000000,
99 DATA_RATE_20MHZ = 20000000,
100 DATA_RATE_40MHZ = 40000000,
101 DATA_RATE_80MHZ = 80000000,
102};
103
107class NullPin : public GPIOPin {
108 friend class SPIComponent;
109
110 friend class SPIDelegate;
111
112 friend class Utility;
113
114 public:
115 void setup() override {}
116
117 void pin_mode(gpio::Flags flags) override {}
118
119 gpio::Flags get_flags() const override { return gpio::Flags::FLAG_NONE; }
120
121 bool digital_read() override { return false; }
122
123 void digital_write(bool value) override {}
124
125 size_t dump_summary(char *buffer, size_t len) const override {
126 if (len > 0)
127 buffer[0] = '\0';
128 return 0;
129 }
130
131 protected:
132 static GPIOPin *const NULL_PIN; // NOLINT(cppcoreguidelines-avoid-non-const-global-variables)
133 // https://bugs.llvm.org/show_bug.cgi?id=48040
134};
135
136class Utility {
137 public:
138 static int get_pin_no(GPIOPin *pin) {
139 if (pin == nullptr || !pin->is_internal())
140 return -1;
141 if (((InternalGPIOPin *) pin)->is_inverted())
142 return -1;
143 return ((InternalGPIOPin *) pin)->get_pin();
144 }
145
147 if (polarity == CLOCK_POLARITY_HIGH) {
148 return phase == CLOCK_PHASE_LEADING ? MODE2 : MODE3;
149 }
150 return phase == CLOCK_PHASE_LEADING ? MODE0 : MODE1;
151 }
152
154 switch (mode) {
155 case MODE0:
156 case MODE2:
157 return CLOCK_PHASE_LEADING;
158 default:
160 }
161 }
162
164 switch (mode) {
165 case MODE0:
166 case MODE1:
167 return CLOCK_POLARITY_LOW;
168 default:
169 return CLOCK_POLARITY_HIGH;
170 }
171 }
172};
173
174class SPIDelegateDummy;
175
176// represents a device attached to an SPI bus, with a defined clock rate, mode and bit order. On Arduino this is
177// a thin wrapper over SPIClass.
179 friend class SPIClient;
180
181 public:
182 SPIDelegate() = default;
183
184 SPIDelegate(uint32_t data_rate, SPIBitOrder bit_order, SPIMode mode, GPIOPin *cs_pin)
185 : bit_order_(bit_order), data_rate_(data_rate), mode_(mode), cs_pin_(cs_pin) {
186 if (this->cs_pin_ == nullptr)
188 this->cs_pin_->setup();
189 this->cs_pin_->digital_write(true);
190 }
191
192 virtual ~SPIDelegate(){};
193
194 // enable CS if configured.
195 virtual void begin_transaction() { this->cs_pin_->digital_write(false); }
196
197 // end the transaction
198 virtual void end_transaction() { this->cs_pin_->digital_write(true); }
199
200 // transfer one byte, return the byte that was read.
201 virtual uint8_t transfer(uint8_t data) = 0;
202
203 // transfer a buffer, replace the contents with read data
204 virtual void transfer(uint8_t *ptr, size_t length) { this->transfer(ptr, ptr, length); }
205
206 virtual void transfer(const uint8_t *txbuf, uint8_t *rxbuf, size_t length) {
207 for (size_t i = 0; i != length; i++)
208 rxbuf[i] = this->transfer(txbuf[i]);
209 }
210
216 virtual void write(uint16_t data, size_t num_bits) {
217 esph_log_e("spi_device", "variable length write not implemented");
218 }
219
220 virtual void write_cmd_addr_data(size_t cmd_bits, uint32_t cmd, size_t addr_bits, uint32_t address,
221 const uint8_t *data, size_t length, uint8_t bus_width) {
222 esph_log_e("spi_device", "write_cmd_addr_data not implemented");
223 }
224 // write 16 bits
225 virtual void write16(uint16_t data) {
226 if (this->bit_order_ == BIT_ORDER_MSB_FIRST) {
227 uint16_t buffer;
228 buffer = (data >> 8) | (data << 8);
229 this->write_array(reinterpret_cast<const uint8_t *>(&buffer), 2);
230 } else {
231 this->write_array(reinterpret_cast<const uint8_t *>(&data), 2);
232 }
233 }
234
235 virtual void write_array16(const uint16_t *data, size_t length) {
236 for (size_t i = 0; i != length; i++) {
237 this->write16(data[i]);
238 }
239 }
240
241 // write the contents of a buffer, ignore read data (buffer is unchanged.)
242 virtual void write_array(const uint8_t *ptr, size_t length) {
243 for (size_t i = 0; i != length; i++)
244 this->transfer(ptr[i]);
245 }
246
247 // read into a buffer, write nulls
248 virtual void read_array(uint8_t *ptr, size_t length) {
249 for (size_t i = 0; i != length; i++)
250 ptr[i] = this->transfer(0);
251 }
252
253 // check if device is ready
254 virtual bool is_ready();
255
256#ifdef USE_SPI_PSRAM_DMA
257 void set_psram_dma(bool enable) { this->psram_dma_ = enable; }
258#endif
259
260 protected:
265#ifdef USE_SPI_PSRAM_DMA
266 bool psram_dma_{false};
267#endif
268 static SPIDelegate *const NULL_DELEGATE; // NOLINT(cppcoreguidelines-avoid-non-const-global-variables)
269};
270
276 public:
277 SPIDelegateDummy() = default;
278
279 uint8_t transfer(uint8_t data) override { return 0; }
280 void end_transaction() override{};
281
282 void begin_transaction() override;
283};
284
290 public:
291 SPIDelegateBitBash(uint32_t clock, SPIBitOrder bit_order, SPIMode mode, GPIOPin *cs_pin, GPIOPin *clk_pin,
292 GPIOPin *sdo_pin, GPIOPin *sdi_pin)
293 : SPIDelegate(clock, bit_order, mode, cs_pin), clk_pin_(clk_pin), sdo_pin_(sdo_pin), sdi_pin_(sdi_pin) {
294 // this calculation is pretty meaningless except at very low bit rates.
295 this->wait_cycle_ = uint32_t(arch_get_cpu_freq_hz()) / this->data_rate_ / 2ULL;
298 }
299
300 uint8_t transfer(uint8_t data) override;
301
302 void write(uint16_t data, size_t num_bits) override;
303
304 void write16(uint16_t data) override { this->write(data, 16); };
305
306 protected:
314
315 void HOT cycle_clock_() {
316 while (this->last_transition_ - arch_get_cpu_cycle_count() < this->wait_cycle_)
317 continue;
318 this->last_transition_ += this->wait_cycle_;
319 }
320 uint16_t transfer_(uint16_t data, size_t num_bits);
321};
322
323class SPIBus {
324 public:
325 SPIBus() = default;
326
327 SPIBus(GPIOPin *clk, GPIOPin *sdo, GPIOPin *sdi) : clk_pin_(clk), sdo_pin_(sdo), sdi_pin_(sdi) {}
328
329 virtual SPIDelegate *get_delegate(uint32_t data_rate, SPIBitOrder bit_order, SPIMode mode, GPIOPin *cs_pin,
330 bool release_device, bool write_only) {
331 return new SPIDelegateBitBash(data_rate, bit_order, mode, cs_pin, this->clk_pin_, this->sdo_pin_, this->sdi_pin_);
332 }
333
334 virtual bool is_hw() { return false; }
335
336 protected:
340};
341
342class SPIClient;
343
344class SPIComponent final : public Component {
345 public:
346 SPIDelegate *register_device(SPIClient *device, SPIMode mode, SPIBitOrder bit_order, uint32_t data_rate,
347 GPIOPin *cs_pin, bool release_device, bool write_only);
348 void unregister_device(SPIClient *device);
349
350 void set_clk(GPIOPin *clk) { this->clk_pin_ = clk; }
351
352 void set_miso(GPIOPin *sdi) { this->sdi_pin_ = sdi; }
353
354 void set_mosi(GPIOPin *sdo) { this->sdo_pin_ = sdo; }
355 void set_data_pins(std::vector<uint8_t> pins) { this->data_pins_ = std::move(pins); }
356
357 void set_interface(SPIInterface interface) {
358 this->interface_ = interface;
359 this->using_hw_ = true;
360 }
361
362 SPIInterface get_interface() const { return this->interface_; }
363
364 void set_interface_name(const char *name) { this->interface_name_ = name; }
365
366 float get_setup_priority() const override { return setup_priority::BUS; }
367
368 void setup() override;
369 void dump_config() override;
370 size_t get_bus_width() const {
371 if (this->data_pins_.empty()) {
372 return 1;
373 }
374 return this->data_pins_.size();
375 }
376
377 protected:
378 GPIOPin *clk_pin_{nullptr};
379 GPIOPin *sdi_pin_{nullptr};
380 GPIOPin *sdo_pin_{nullptr};
381 std::vector<uint8_t> data_pins_{};
382
384 bool using_hw_{false};
385 const char *interface_name_{nullptr};
387 std::map<SPIClient *, SPIDelegate *> devices_;
388
389 static SPIBus *get_bus(SPIInterface interface, GPIOPin *clk, GPIOPin *sdo, GPIOPin *sdi,
390 const std::vector<uint8_t> &data_pins);
391};
392
399 public:
401 : bit_order_(bit_order), mode_(mode), data_rate_(data_rate) {}
402
403 virtual void spi_setup() {
404 esph_log_d("spi_device", "mode %u, data_rate %ukHz", (unsigned) this->mode_, (unsigned) (this->data_rate_ / 1000));
405 this->delegate_ = this->parent_->register_device(this, this->mode_, this->bit_order_, this->data_rate_, this->cs_,
406 this->release_device_, this->write_only_);
407#ifdef USE_SPI_PSRAM_DMA
408 this->delegate_->set_psram_dma(this->psram_dma_);
409 if (this->psram_dma_) {
410 esph_log_config("spi_device", "PSRAM DMA: enabled");
411 }
412#endif
413 }
414
415 virtual void spi_teardown() {
416 this->parent_->unregister_device(this);
418 }
419
420 bool spi_is_ready() { return this->delegate_->is_ready(); }
421 void set_release_device(bool release) { this->release_device_ = release; }
422 void set_write_only(bool write_only) { this->write_only_ = write_only; }
423#ifdef USE_SPI_PSRAM_DMA
424 void set_psram_dma(bool enable) { this->psram_dma_ = enable; }
425#endif
426
427 protected:
432 GPIOPin *cs_{nullptr};
433 bool release_device_{false};
434 bool write_only_{false};
435#ifdef USE_SPI_PSRAM_DMA
436 bool psram_dma_{false};
437#endif
439};
440
449template<SPIBitOrder BIT_ORDER, SPIClockPolarity CLOCK_POLARITY, SPIClockPhase CLOCK_PHASE, SPIDataRate DATA_RATE>
450class SPIDevice : public SPIClient {
451 public:
452 SPIDevice() : SPIClient(BIT_ORDER, Utility::get_mode(CLOCK_POLARITY, CLOCK_PHASE), DATA_RATE) {}
453
454 SPIDevice(SPIComponent *parent, GPIOPin *cs_pin) {
455 this->set_spi_parent(parent);
456 this->set_cs_pin(cs_pin);
457 }
458
459 void spi_setup() override { SPIClient::spi_setup(); }
460
462
463 void set_spi_parent(SPIComponent *parent) { this->parent_ = parent; }
464
465 void set_cs_pin(GPIOPin *cs) { this->cs_ = cs; }
466
467 void set_data_rate(uint32_t data_rate) { this->data_rate_ = data_rate; }
468
469 void set_bit_order(SPIBitOrder order) { this->bit_order_ = order; }
470
471 void set_mode(SPIMode mode) { this->mode_ = mode; }
472
473 uint8_t read_byte() { return this->delegate_->transfer(0); }
474
475 void read_array(uint8_t *data, size_t length) { this->delegate_->read_array(data, length); }
476
482 void write(uint16_t data, size_t num_bits) { this->delegate_->write(data, num_bits); };
483
484 /* Write command, address and data. Command and address will be written as single-bit SPI,
485 * data phase can be multiple bit (currently only 1 or 4)
486 * @param cmd_bits Number of bits to write in the command phase
487 * @param cmd The command value to write
488 * @param addr_bits Number of bits to write in addr phase
489 * @param address Address data
490 * @param data Plain data bytes
491 * @param length Number of data bytes
492 * @param bus_width The number of data lines to use for the data phase.
493 */
494 void write_cmd_addr_data(size_t cmd_bits, uint32_t cmd, size_t addr_bits, uint32_t address, const uint8_t *data,
495 size_t length, uint8_t bus_width = 1) {
496 this->delegate_->write_cmd_addr_data(cmd_bits, cmd, addr_bits, address, data, length, bus_width);
497 }
498
499 void write_byte(uint8_t data) { this->delegate_->write_array(&data, 1); }
500
506 void transfer_array(uint8_t *data, size_t length) { this->delegate_->transfer(data, length); }
507
508 uint8_t transfer_byte(uint8_t data) { return this->delegate_->transfer(data); }
509
512 void write_byte16(uint16_t data) { this->delegate_->write16(data); }
513
520 void write_array16(const uint16_t *data, size_t length) { this->delegate_->write_array16(data, length); }
521
522 void enable() { this->delegate_->begin_transaction(); }
523
524 void disable() { this->delegate_->end_transaction(); }
525
526 void write_array(const uint8_t *data, size_t length) { this->delegate_->write_array(data, length); }
527
528 template<size_t N> void write_array(const std::array<uint8_t, N> &data) { this->write_array(data.data(), N); }
529
530 void write_array(const std::vector<uint8_t> &data) { this->write_array(data.data(), data.size()); }
531
532 template<size_t N> void transfer_array(std::array<uint8_t, N> &data) { this->transfer_array(data.data(), N); }
533};
534
535} // namespace esphome::spi
BedjetMode mode
BedJet operating mode.
uint8_t address
Definition bl0906.h:4
virtual void setup()=0
virtual void digital_write(bool value)=0
virtual bool is_internal()
Definition gpio.h:81
A pin to replace those that don't exist.
Definition spi.h:107
gpio::Flags get_flags() const override
Definition spi.h:119
static GPIOPin *const NULL_PIN
Definition spi.h:132
bool digital_read() override
Definition spi.h:121
void setup() override
Definition spi.h:115
void pin_mode(gpio::Flags flags) override
Definition spi.h:117
size_t dump_summary(char *buffer, size_t len) const override
Definition spi.h:125
void digital_write(bool value) override
Definition spi.h:123
virtual bool is_hw()
Definition spi.h:334
GPIOPin * sdo_pin_
Definition spi.h:338
GPIOPin * clk_pin_
Definition spi.h:337
SPIBus(GPIOPin *clk, GPIOPin *sdo, GPIOPin *sdi)
Definition spi.h:327
virtual SPIDelegate * get_delegate(uint32_t data_rate, SPIBitOrder bit_order, SPIMode mode, GPIOPin *cs_pin, bool release_device, bool write_only)
Definition spi.h:329
GPIOPin * sdi_pin_
Definition spi.h:339
Base class for SPIDevice, un-templated.
Definition spi.h:398
void set_release_device(bool release)
Definition spi.h:421
virtual void spi_teardown()
Definition spi.h:415
uint32_t data_rate_
Definition spi.h:430
void set_write_only(bool write_only)
Definition spi.h:422
SPIBitOrder bit_order_
Definition spi.h:428
SPIDelegate * delegate_
Definition spi.h:438
virtual void spi_setup()
Definition spi.h:403
void set_psram_dma(bool enable)
Definition spi.h:424
SPIComponent * parent_
Definition spi.h:431
SPIClient(SPIBitOrder bit_order, SPIMode mode, uint32_t data_rate)
Definition spi.h:400
void setup() override
Definition spi.cpp:38
size_t get_bus_width() const
Definition spi.h:370
void set_interface(SPIInterface interface)
Definition spi.h:357
SPIInterface get_interface() const
Definition spi.h:362
void unregister_device(SPIClient *device)
Definition spi.cpp:29
static SPIBus * get_bus(SPIInterface interface, GPIOPin *clk, GPIOPin *sdo, GPIOPin *sdi, const std::vector< uint8_t > &data_pins)
Definition spi.cpp:123
std::map< SPIClient *, SPIDelegate * > devices_
Definition spi.h:387
float get_setup_priority() const override
Definition spi.h:366
void set_clk(GPIOPin *clk)
Definition spi.h:350
void set_data_pins(std::vector< uint8_t > pins)
Definition spi.h:355
void dump_config() override
Definition spi.cpp:65
void set_miso(GPIOPin *sdi)
Definition spi.h:352
SPIInterface interface_
Definition spi.h:383
SPIDelegate * register_device(SPIClient *device, SPIMode mode, SPIBitOrder bit_order, uint32_t data_rate, GPIOPin *cs_pin, bool release_device, bool write_only)
Definition spi.cpp:17
const char * interface_name_
Definition spi.h:385
void set_interface_name(const char *name)
Definition spi.h:364
void set_mosi(GPIOPin *sdo)
Definition spi.h:354
std::vector< uint8_t > data_pins_
Definition spi.h:381
An implementation of SPI that relies only on software toggling of pins.
Definition spi.h:289
uint8_t transfer(uint8_t data) override
Definition spi.cpp:82
SPIClockPolarity clock_polarity_
Definition spi.h:312
SPIDelegateBitBash(uint32_t clock, SPIBitOrder bit_order, SPIMode mode, GPIOPin *cs_pin, GPIOPin *clk_pin, GPIOPin *sdo_pin, GPIOPin *sdi_pin)
Definition spi.h:291
void write(uint16_t data, size_t num_bits) override
Definition spi.cpp:84
SPIClockPhase clock_phase_
Definition spi.h:313
uint16_t transfer_(uint16_t data, size_t num_bits)
Definition spi.cpp:86
void write16(uint16_t data) override
Definition spi.h:304
A dummy SPIDelegate that complains if it's used.
Definition spi.h:275
uint8_t transfer(uint8_t data) override
Definition spi.h:279
void end_transaction() override
Definition spi.h:280
void begin_transaction() override
Definition spi.cpp:80
virtual uint8_t transfer(uint8_t data)=0
SPIDelegate(uint32_t data_rate, SPIBitOrder bit_order, SPIMode mode, GPIOPin *cs_pin)
Definition spi.h:184
virtual void end_transaction()
Definition spi.h:198
virtual ~SPIDelegate()
Definition spi.h:192
void set_psram_dma(bool enable)
Definition spi.h:257
virtual void begin_transaction()
Definition spi.h:195
virtual void read_array(uint8_t *ptr, size_t length)
Definition spi.h:248
virtual void write(uint16_t data, size_t num_bits)
write a variable length data item, up to 16 bits.
Definition spi.h:216
virtual bool is_ready()
Definition spi.cpp:13
virtual void transfer(uint8_t *ptr, size_t length)
Definition spi.h:204
virtual void write_array(const uint8_t *ptr, size_t length)
Definition spi.h:242
virtual void write_cmd_addr_data(size_t cmd_bits, uint32_t cmd, size_t addr_bits, uint32_t address, const uint8_t *data, size_t length, uint8_t bus_width)
Definition spi.h:220
SPIBitOrder bit_order_
Definition spi.h:261
virtual void write16(uint16_t data)
Definition spi.h:225
virtual void transfer(const uint8_t *txbuf, uint8_t *rxbuf, size_t length)
Definition spi.h:206
virtual void write_array16(const uint16_t *data, size_t length)
Definition spi.h:235
static SPIDelegate *const NULL_DELEGATE
Definition spi.h:268
The SPIDevice is what components using the SPI will create.
Definition spi.h:450
void set_data_rate(uint32_t data_rate)
Definition spi.h:467
void write_byte16(uint16_t data)
Write 16 bit data.
Definition spi.h:512
void write_array(const std::array< uint8_t, N > &data)
Definition spi.h:528
void spi_setup() override
Definition spi.h:459
void set_cs_pin(GPIOPin *cs)
Definition spi.h:465
void set_mode(SPIMode mode)
Definition spi.h:471
void transfer_array(uint8_t *data, size_t length)
Write the array data, replace with received data.
Definition spi.h:506
void set_bit_order(SPIBitOrder order)
Definition spi.h:469
void set_spi_parent(SPIComponent *parent)
Definition spi.h:463
void transfer_array(std::array< uint8_t, N > &data)
Definition spi.h:532
uint8_t read_byte()
Definition spi.h:473
void write_byte(uint8_t data)
Definition spi.h:499
void write(uint16_t data, size_t num_bits)
Write a single data item, up to 32 bits.
Definition spi.h:482
void write_array16(const uint16_t *data, size_t length)
Write an array of data as 16 bit values, byte-swapping if required.
Definition spi.h:520
uint8_t transfer_byte(uint8_t data)
Definition spi.h:508
void write_array(const uint8_t *data, size_t length)
Definition spi.h:526
void write_array(const std::vector< uint8_t > &data)
Definition spi.h:530
void write_cmd_addr_data(size_t cmd_bits, uint32_t cmd, size_t addr_bits, uint32_t address, const uint8_t *data, size_t length, uint8_t bus_width=1)
Definition spi.h:494
SPIDevice(SPIComponent *parent, GPIOPin *cs_pin)
Definition spi.h:454
void spi_teardown() override
Definition spi.h:461
void read_array(uint8_t *data, size_t length)
Definition spi.h:475
static int get_pin_no(GPIOPin *pin)
Definition spi.h:138
static SPIClockPhase get_phase(SPIMode mode)
Definition spi.h:153
static SPIClockPolarity get_polarity(SPIMode mode)
Definition spi.h:163
static SPIMode get_mode(SPIClockPolarity polarity, SPIClockPhase phase)
Definition spi.h:146
uint16_t flags
@ FLAG_NONE
Definition gpio.h:24
constexpr float BUS
For communication buses like i2c/spi.
Definition component.h:39
Implementation of SPI Controller mode.
Definition spi.cpp:5
SPIMode
Modes mapping to clock phase and polarity.
Definition spi.h:78
@ MODE0
Definition spi.h:79
@ MODE2
Definition spi.h:81
@ MODE1
Definition spi.h:80
@ MODE3
Definition spi.h:82
SPIDataRate
The SPI clock signal frequency, which determines the transfer bit rate/second.
Definition spi.h:89
@ DATA_RATE_200KHZ
Definition spi.h:92
@ DATA_RATE_20MHZ
Definition spi.h:99
@ DATA_RATE_1KHZ
Definition spi.h:90
@ DATA_RATE_2MHZ
Definition spi.h:94
@ DATA_RATE_5MHZ
Definition spi.h:96
@ DATA_RATE_8MHZ
Definition spi.h:97
@ DATA_RATE_80MHZ
Definition spi.h:101
@ DATA_RATE_10MHZ
Definition spi.h:98
@ DATA_RATE_4MHZ
Definition spi.h:95
@ DATA_RATE_1MHZ
Definition spi.h:93
@ DATA_RATE_40MHZ
Definition spi.h:100
@ DATA_RATE_75KHZ
Definition spi.h:91
SPIBitOrder
The bit-order for SPI devices. This defines how the data read from and written to the device is inter...
Definition spi.h:40
@ BIT_ORDER_LSB_FIRST
The least significant bit is transmitted/received first.
Definition spi.h:42
@ BIT_ORDER_MSB_FIRST
The most significant bit is transmitted/received first.
Definition spi.h:44
SPIClockPolarity
The SPI clock signal polarity,.
Definition spi.h:50
@ CLOCK_POLARITY_HIGH
The clock signal idles on HIGH.
Definition spi.h:60
@ CLOCK_POLARITY_LOW
The clock signal idles on LOW.
Definition spi.h:55
SPIClockPhase
The SPI clock signal phase.
Definition spi.h:66
@ CLOCK_PHASE_LEADING
The data is sampled on a leading clock edge. (CPHA=0)
Definition spi.h:68
@ CLOCK_PHASE_TRAILING
The data is sampled on a trailing clock edge. (CPHA=1)
Definition spi.h:70
uint32_t arch_get_cpu_cycle_count()
Definition hal.cpp:71
const void size_t len
Definition hal.h:64
uint32_t arch_get_cpu_freq_hz()
Definition hal.cpp:63
static void uint32_t
spi_host_device_t SPIInterface
Definition spi.h:14
uint16_t length
Definition tt21100.cpp:0