15static constexpr size_t SWAP_BUFFER_WORDS = 64;
18 spi_operation_t op = SPI_OP_MODE_MASTER | SPI_WORD_SET(8);
30 bool release_device,
bool write_only) {
37 this->
cfg_.frequency = data_rate;
38 this->
cfg_.operation = build_operation(bit_order,
mode);
47 spi_transceive(this->
bus_->
dev_, &this->bus_->idle_cfg_,
nullptr,
nullptr);
54 const int err = spi_transceive(this->
bus_->
dev_, &this->cfg_,
nullptr,
nullptr);
58 ESP_LOGE(TAG,
"spi_transceive failed: %d", err);
69 const spi_buf tx_buf{
const_cast<uint8_t *
>(tx),
length};
70 const spi_buf rx_buf{rx,
length};
71 const spi_buf_set tx_set{&tx_buf, 1};
72 const spi_buf_set rx_set{&rx_buf, 1};
73 const int err = spi_transceive(this->
bus_->
dev_, &this->cfg_, tx !=
nullptr ? &tx_set :
nullptr,
74 rx !=
nullptr ? &rx_set :
nullptr);
76 ESP_LOGE(TAG,
"spi_transceive failed: %d", err);
99 uint16_t
buffer[SWAP_BUFFER_WORDS];
101 const size_t partial = std::min(
length, SWAP_BUFFER_WORDS);
102 for (
size_t i = 0; i != partial; i++)
BedjetMode mode
BedJet operating mode.
virtual void begin_transaction()
static SPIClockPhase get_phase(SPIMode mode)
static SPIClockPolarity get_polarity(SPIMode mode)
const ZephyrSPIDelegate * active_
friend class ZephyrSPIDelegate
SPIDelegate * get_delegate(uint32_t data_rate, SPIBitOrder bit_order, SPIMode mode, GPIOPin *cs_pin, bool release_device, bool write_only) override
void write_array16(const uint16_t *data, size_t length) override
void read_array(uint8_t *ptr, size_t length) override
ZephyrSPIDelegate(ZephyrSPIBus *bus, uint32_t data_rate, SPIBitOrder bit_order, SPIMode mode, GPIOPin *cs_pin)
void begin_transaction() override
void transceive_(const uint8_t *tx, uint8_t *rx, size_t length)
One spi_transceive; rx (if given) is zeroed when the transfer fails.
void write_array(const uint8_t *ptr, size_t length) override
uint8_t transfer(uint8_t data) override
~ZephyrSPIDelegate() override
Implementation of SPI Controller mode.
SPIMode
Modes mapping to clock phase and polarity.
SPIBitOrder
The bit-order for SPI devices. This defines how the data read from and written to the device is inter...
@ BIT_ORDER_LSB_FIRST
The least significant bit is transmitted/received first.
ESPHOME_LOG_TAG(TAG, "spi")
@ CLOCK_POLARITY_HIGH
The clock signal idles on HIGH.
@ CLOCK_PHASE_TRAILING
The data is sampled on a trailing clock edge. (CPHA=1)