ESPHome 2026.3.0-dev
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cc1101.cpp
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1#include "cc1101.h"
2#include "cc1101pa.h"
4#include "esphome/core/log.h"
5#include <cmath>
6
7namespace esphome::cc1101 {
8
9static const char *const TAG = "cc1101";
10
11static void split_float(float value, int mbits, uint8_t &e, uint32_t &m) {
12 int e_tmp;
13 float m_tmp = std::frexp(value, &e_tmp);
14 if (e_tmp <= mbits) {
15 e = 0;
16 m = 0;
17 return;
18 }
19 e = static_cast<uint8_t>(e_tmp - mbits - 1);
20 m = static_cast<uint32_t>(((m_tmp * 2 - 1) * (1 << (mbits + 1))) + 1) >> 1;
21 if (m == (1UL << mbits)) {
22 e = e + 1;
23 m = 0;
24 }
25}
26
28 // Datasheet defaults
29 memset(&this->state_, 0, sizeof(this->state_));
30 this->state_.GDO2_CFG = 0x0D; // Serial Data (for RX on GDO2)
31 this->state_.GDO1_CFG = 0x2E;
32 this->state_.GDO0_CFG = 0x0D; // Serial Data (for RX on GDO0 / TX Input)
33 this->state_.FIFO_THR = 7;
34 this->state_.SYNC1 = 0xD3;
35 this->state_.SYNC0 = 0x91;
36 this->state_.PKTLEN = 0xFF;
37 this->state_.APPEND_STATUS = 1;
38 this->state_.LENGTH_CONFIG = 1;
39 this->state_.CRC_EN = 1;
40 this->state_.WHITE_DATA = 1;
41 this->state_.FREQ_IF = 0x0F;
42 this->state_.FREQ2 = 0x1E;
43 this->state_.FREQ1 = 0xC4;
44 this->state_.FREQ0 = 0xEC;
45 this->state_.DRATE_E = 0x0C;
46 this->state_.CHANBW_E = 0x02;
47 this->state_.DRATE_M = 0x22;
48 this->state_.SYNC_MODE = 2;
49 this->state_.CHANSPC_E = 2;
50 this->state_.NUM_PREAMBLE = 2;
51 this->state_.CHANSPC_M = 0xF8;
52 this->state_.DEVIATION_M = 7;
53 this->state_.DEVIATION_E = 4;
54 this->state_.RX_TIME = 7;
55 this->state_.CCA_MODE = 3;
56 this->state_.PO_TIMEOUT = 1;
57 this->state_.FOC_LIMIT = 2;
58 this->state_.FOC_POST_K = 1;
59 this->state_.FOC_PRE_K = 2;
60 this->state_.FOC_BS_CS_GATE = 1;
61 this->state_.BS_POST_KP = 1;
62 this->state_.BS_POST_KI = 1;
63 this->state_.BS_PRE_KP = 2;
64 this->state_.BS_PRE_KI = 1;
65 this->state_.MAGN_TARGET = 3;
66 this->state_.AGC_LNA_PRIORITY = 1;
67 this->state_.FILTER_LENGTH = 1;
68 this->state_.WAIT_TIME = 1;
69 this->state_.HYST_LEVEL = 2;
70 this->state_.WOREVT1 = 0x87;
71 this->state_.WOREVT0 = 0x6B;
72 this->state_.RC_CAL = 1;
73 this->state_.EVENT1 = 7;
74 this->state_.RC_PD = 1;
75 this->state_.MIX_CURRENT = 2;
76 this->state_.LODIV_BUF_CURRENT_RX = 1;
77 this->state_.LNA2MIX_CURRENT = 1;
78 this->state_.LNA_CURRENT = 1;
79 this->state_.LODIV_BUF_CURRENT_TX = 1;
80 this->state_.FSCAL3_LO = 9;
81 this->state_.CHP_CURR_CAL_EN = 2;
82 this->state_.FSCAL3_HI = 2;
83 this->state_.FSCAL2 = 0x0A;
84 this->state_.FSCAL1 = 0x20;
85 this->state_.FSCAL0 = 0x0D;
86 this->state_.RCCTRL1 = 0x41;
87 this->state_.FSTEST = 0x59;
88 this->state_.PTEST = 0x7F;
89 this->state_.AGCTEST = 0x3F;
90 this->state_.TEST2 = 0x88;
91 this->state_.TEST1 = 0x31;
92 this->state_.TEST0_LO = 1;
93 this->state_.VCO_SEL_CAL_EN = 1;
94 this->state_.TEST0_HI = 2;
95
96 // PKTCTRL0
97 this->state_.PKT_FORMAT = 3;
98 this->state_.LENGTH_CONFIG = 2;
99 this->state_.FS_AUTOCAL = 1;
100
101 // CRITICAL: Initialize PA Table to avoid transmitting 0 power (Silence)
102 memset(this->pa_table_, 0, sizeof(this->pa_table_));
103}
104
106 this->spi_setup();
107 this->cs_->digital_write(true);
109 this->cs_->digital_write(false);
111 this->cs_->digital_write(true);
113 this->cs_->digital_write(false);
114 delay(5);
115
116 this->strobe_(Command::RES);
117 delay(5);
118
121 this->chip_id_ = encode_uint16(this->state_.PARTNUM, this->state_.VERSION);
122 ESP_LOGD(TAG, "CC1101 found! Chip ID: 0x%04X", this->chip_id_);
123 if (this->state_.VERSION == 0 || this->state_.PARTNUM == 0xFF) {
124 ESP_LOGE(TAG, "Failed to verify CC1101.");
125 this->mark_failed();
126 return;
127 }
128
129 // Setup GDO0 pin if configured
130 if (this->gdo0_pin_ != nullptr) {
131 this->gdo0_pin_->setup();
132 }
133
134 this->initialized_ = true;
135
136 for (uint8_t i = 0; i <= static_cast<uint8_t>(Register::TEST0); i++) {
137 if (i == static_cast<uint8_t>(Register::FSTEST) || i == static_cast<uint8_t>(Register::AGCTEST)) {
138 continue;
139 }
140 this->write_(static_cast<Register>(i));
141 }
143 if (!this->enter_rx_()) {
144 this->mark_failed();
145 return;
146 }
147
148 // Defer pin mode setup until after all components have completed setup()
149 // This handles the case where remote_transmitter runs after CC1101 and changes pin mode
150 if (this->gdo0_pin_ != nullptr) {
151 this->defer([this]() { this->gdo0_pin_->pin_mode(gpio::FLAG_INPUT); });
152 }
153}
154
155void CC1101Component::call_listeners_(const std::vector<uint8_t> &packet, float freq_offset, float rssi, uint8_t lqi) {
156 for (auto &listener : this->listeners_) {
157 listener->on_packet(packet, freq_offset, rssi, lqi);
158 }
159 this->packet_trigger_.trigger(packet, freq_offset, rssi, lqi);
160}
161
163 if (this->state_.PKT_FORMAT != static_cast<uint8_t>(PacketFormat::PACKET_FORMAT_FIFO) || this->gdo0_pin_ == nullptr ||
164 !this->gdo0_pin_->digital_read()) {
165 return;
166 }
167
168 // Read state
170 uint8_t rx_bytes = this->state_.NUM_RXBYTES;
171 bool overflow = this->state_.RXFIFO_OVERFLOW;
172 if (overflow || rx_bytes == 0) {
173 ESP_LOGW(TAG, "RX FIFO overflow, flushing");
174 this->enter_idle_();
175 this->strobe_(Command::FRX);
176 this->enter_rx_();
177 return;
178 }
179
180 // Read packet
181 uint8_t payload_length, expected_rx;
182 if (this->state_.LENGTH_CONFIG == static_cast<uint8_t>(LengthConfig::LENGTH_CONFIG_VARIABLE)) {
183 this->read_(Register::FIFO, &payload_length, 1);
184 expected_rx = payload_length + 1;
185 } else {
186 payload_length = this->state_.PKTLEN;
187 expected_rx = payload_length;
188 }
189 if (payload_length == 0 || payload_length > 64 || rx_bytes != expected_rx) {
190 ESP_LOGW(TAG, "Invalid packet: rx_bytes %u, payload_length %u", rx_bytes, payload_length);
191 this->enter_idle_();
192 this->strobe_(Command::FRX);
193 this->enter_rx_();
194 return;
195 }
196 this->packet_.resize(payload_length);
197 this->read_(Register::FIFO, this->packet_.data(), payload_length);
198
199 // Read status from registers (more reliable than FIFO status bytes due to timing issues)
201 this->read_(Register::RSSI);
202 this->read_(Register::LQI);
203 float freq_offset = static_cast<int8_t>(this->state_.FREQEST) * (XTAL_FREQUENCY / (1 << 14));
204 float rssi = (this->state_.RSSI * RSSI_STEP) - RSSI_OFFSET;
205 bool crc_ok = (this->state_.LQI & STATUS_CRC_OK_MASK) != 0;
206 uint8_t lqi = this->state_.LQI & STATUS_LQI_MASK;
207 if (this->state_.CRC_EN == 0 || crc_ok) {
208 this->call_listeners_(this->packet_, freq_offset, rssi, lqi);
209 }
210
211 // Return to rx
212 this->enter_idle_();
213 this->strobe_(Command::FRX);
214 this->enter_rx_();
215}
216
218 static const char *const MODULATION_NAMES[] = {"2-FSK", "GFSK", "UNUSED", "ASK/OOK",
219 "4-FSK", "UNUSED", "UNUSED", "MSK"};
220 int32_t freq = static_cast<int32_t>(this->state_.FREQ2 << 16 | this->state_.FREQ1 << 8 | this->state_.FREQ0) *
221 XTAL_FREQUENCY / (1 << 16);
222 float symbol_rate = (((256.0f + this->state_.DRATE_M) * (1 << this->state_.DRATE_E)) / (1 << 28)) * XTAL_FREQUENCY;
223 float bw = XTAL_FREQUENCY / (8.0f * (4 + this->state_.CHANBW_M) * (1 << this->state_.CHANBW_E));
224 ESP_LOGCONFIG(TAG,
225 "CC1101:\n"
226 " Chip ID: 0x%04X\n"
227 " Frequency: %" PRId32 " Hz\n"
228 " Channel: %u\n"
229 " Modulation: %s\n"
230 " Symbol Rate: %.0f baud\n"
231 " Filter Bandwidth: %.1f Hz\n"
232 " Output Power: %.1f dBm",
233 this->chip_id_, freq, this->state_.CHANNR, MODULATION_NAMES[this->state_.MOD_FORMAT & 0x07],
234 symbol_rate, bw, this->output_power_effective_);
235 LOG_PIN(" CS Pin: ", this->cs_);
236}
237
239 // Ensure Packet Format is 3 (Async Serial)
240 this->write_(Register::PKTCTRL0, 0x32);
241 ESP_LOGV(TAG, "Beginning TX sequence");
242 if (this->gdo0_pin_ != nullptr) {
244 }
245 if (!this->enter_tx_()) {
246 ESP_LOGW(TAG, "Failed to enter TX state!");
247 }
248}
249
251 ESP_LOGV(TAG, "Beginning RX sequence");
252 if (this->gdo0_pin_ != nullptr) {
254 }
255 if (!this->enter_rx_()) {
256 ESP_LOGW(TAG, "Failed to enter RX state!");
257 }
258}
259
261 this->strobe_(Command::RES);
262 this->setup();
263}
264
266 ESP_LOGV(TAG, "Setting IDLE state");
267 this->enter_idle_();
268}
269
270bool CC1101Component::wait_for_state_(State target_state, uint32_t timeout_ms) {
271 uint32_t start = millis();
272 while (millis() - start < timeout_ms) {
274 State s = static_cast<State>(this->state_.MARC_STATE);
275 if (s == target_state) {
276 return true;
277 }
279 }
280 return false;
281}
282
284 // The PLL must be recalibrated until PLL lock is achieved
285 for (uint8_t retries = PLL_LOCK_RETRIES; retries > 0; retries--) {
286 this->strobe_(cmd);
287 if (!this->wait_for_state_(target_state)) {
288 return false;
289 }
290 this->read_(Register::FSCAL1);
291 if (this->state_.FSCAL1 != FSCAL1_PLL_NOT_LOCKED) {
292 return true;
293 }
294 ESP_LOGW(TAG, "PLL lock failed, retrying calibration");
295 this->enter_idle_();
296 }
297 ESP_LOGE(TAG, "PLL lock failed after retries");
298 return false;
299}
300
305
307
309
311 uint8_t index = static_cast<uint8_t>(cmd);
312 if (cmd < Command::RES || cmd > Command::NOP) {
313 return 0xFF;
314 }
315 this->enable();
316 uint8_t status_byte = this->transfer_byte(index);
317 this->disable();
318 return status_byte;
319}
320
322 uint8_t index = static_cast<uint8_t>(reg);
323 this->enable();
324 this->write_byte(index);
325 this->write_array(&this->state_.regs()[index], 1);
326 this->disable();
327}
328
329void CC1101Component::write_(Register reg, uint8_t value) {
330 uint8_t index = static_cast<uint8_t>(reg);
331 this->state_.regs()[index] = value;
332 this->write_(reg);
333}
334
335void CC1101Component::write_(Register reg, const uint8_t *buffer, size_t length) {
336 uint8_t index = static_cast<uint8_t>(reg);
337 this->enable();
338 this->write_byte(index | BUS_WRITE | BUS_BURST);
339 this->write_array(buffer, length);
340 this->disable();
341}
342
344 uint8_t index = static_cast<uint8_t>(reg);
345 this->enable();
346 this->write_byte(index | BUS_READ | BUS_BURST);
347 this->state_.regs()[index] = this->transfer_byte(0);
348 this->disable();
349}
350
351void CC1101Component::read_(Register reg, uint8_t *buffer, size_t length) {
352 uint8_t index = static_cast<uint8_t>(reg);
353 this->enable();
354 this->write_byte(index | BUS_READ | BUS_BURST);
355 this->read_array(buffer, length);
356 this->disable();
357}
358
359CC1101Error CC1101Component::transmit_packet(const std::vector<uint8_t> &packet) {
360 if (this->state_.PKT_FORMAT != static_cast<uint8_t>(PacketFormat::PACKET_FORMAT_FIFO)) {
361 return CC1101Error::PARAMS;
362 }
363
364 // Write packet
365 this->enter_idle_();
366 this->strobe_(Command::FTX);
367 if (this->state_.LENGTH_CONFIG == static_cast<uint8_t>(LengthConfig::LENGTH_CONFIG_VARIABLE)) {
368 this->write_(Register::FIFO, static_cast<uint8_t>(packet.size()));
369 }
370 this->write_(Register::FIFO, packet.data(), packet.size());
371
372 // Calibrate PLL
374 ESP_LOGW(TAG, "PLL lock failed during TX");
375 this->enter_idle_();
376 this->enter_rx_();
378 }
379
380 // Transmit packet
381 this->strobe_(Command::TX);
382 if (!this->wait_for_state_(State::IDLE, 1000)) {
383 ESP_LOGW(TAG, "TX timeout");
384 this->enter_idle_();
385 this->enter_rx_();
387 }
388
389 // Return to rx
390 this->enter_rx_();
391 return CC1101Error::NONE;
392}
393
394// Setters
396 this->output_power_requested_ = value;
397 int32_t freq = static_cast<int32_t>(this->state_.FREQ2 << 16 | this->state_.FREQ1 << 8 | this->state_.FREQ0) *
398 XTAL_FREQUENCY / (1 << 16);
399 uint8_t a = 0xC0;
400 if (freq >= 300000000 && freq <= 348000000) {
401 a = PowerTableItem::find(PA_TABLE_315, sizeof(PA_TABLE_315) / sizeof(PA_TABLE_315[0]), value);
402 } else if (freq >= 378000000 && freq <= 464000000) {
403 a = PowerTableItem::find(PA_TABLE_433, sizeof(PA_TABLE_433) / sizeof(PA_TABLE_433[0]), value);
404 } else if (freq >= 779000000 && freq < 900000000) {
405 a = PowerTableItem::find(PA_TABLE_868, sizeof(PA_TABLE_868) / sizeof(PA_TABLE_868[0]), value);
406 } else if (freq >= 900000000 && freq <= 928000000) {
407 a = PowerTableItem::find(PA_TABLE_915, sizeof(PA_TABLE_915) / sizeof(PA_TABLE_915[0]), value);
408 }
409
410 if (static_cast<Modulation>(this->state_.MOD_FORMAT) == Modulation::MODULATION_ASK_OOK) {
411 this->pa_table_[0] = 0;
412 this->pa_table_[1] = a;
413 } else {
414 this->pa_table_[0] = a;
415 this->pa_table_[1] = 0;
416 }
417 this->output_power_effective_ = value;
418 if (this->initialized_) {
419 this->write_(Register::PATABLE, this->pa_table_, sizeof(this->pa_table_));
420 }
421}
422
424 this->state_.CLOSE_IN_RX = static_cast<uint8_t>(value);
425 if (this->initialized_) {
427 }
428}
429
431 this->state_.DEM_DCFILT_OFF = value ? 0 : 1;
432 if (this->initialized_) {
434 }
435}
436
438 int32_t freq = static_cast<int32_t>(value * (1 << 16) / XTAL_FREQUENCY);
439 this->state_.FREQ2 = static_cast<uint8_t>(freq >> 16);
440 this->state_.FREQ1 = static_cast<uint8_t>(freq >> 8);
441 this->state_.FREQ0 = static_cast<uint8_t>(freq);
442 if (this->initialized_) {
443 this->enter_idle_();
444 this->write_(Register::FREQ2);
445 this->write_(Register::FREQ1);
446 this->write_(Register::FREQ0);
447 this->enter_rx_();
448 }
449}
450
452 this->state_.FREQ_IF = value * (1 << 10) / XTAL_FREQUENCY;
453 if (this->initialized_) {
455 }
456}
457
459 uint8_t e;
460 uint32_t m;
461 split_float(XTAL_FREQUENCY / (value * 8), 2, e, m);
462 this->state_.CHANBW_E = e;
463 this->state_.CHANBW_M = static_cast<uint8_t>(m);
464 if (this->initialized_) {
466 }
467}
468
469void CC1101Component::set_channel(uint8_t value) {
470 this->state_.CHANNR = value;
471 if (this->initialized_) {
472 this->enter_idle_();
474 this->enter_rx_();
475 }
476}
477
479 uint8_t e;
480 uint32_t m;
481 split_float(value * (1 << 18) / XTAL_FREQUENCY, 8, e, m);
482 this->state_.CHANSPC_E = e;
483 this->state_.CHANSPC_M = static_cast<uint8_t>(m);
484 if (this->initialized_) {
487 }
488}
489
491 uint8_t e;
492 uint32_t m;
493 split_float(value * (1 << 17) / XTAL_FREQUENCY, 3, e, m);
494 this->state_.DEVIATION_E = e;
495 this->state_.DEVIATION_M = static_cast<uint8_t>(m);
496 if (this->initialized_) {
498 }
499}
500
502 this->state_.DEVIATION_E = 0;
503 this->state_.DEVIATION_M = value - 1;
504 if (this->initialized_) {
506 }
507}
508
510 uint8_t e;
511 uint32_t m;
512 split_float(value * (1 << 28) / XTAL_FREQUENCY, 8, e, m);
513 this->state_.DRATE_E = e;
514 this->state_.DRATE_M = static_cast<uint8_t>(m);
515 if (this->initialized_) {
518 }
519}
520
522 this->state_.SYNC_MODE = static_cast<uint8_t>(value);
523 if (this->initialized_) {
525 }
526}
527
529 this->state_.CARRIER_SENSE_ABOVE_THRESHOLD = value ? 1 : 0;
530 if (this->initialized_) {
532 }
533}
534
536 this->state_.MOD_FORMAT = static_cast<uint8_t>(value);
537 this->state_.PA_POWER = value == Modulation::MODULATION_ASK_OOK ? 1 : 0;
538 if (this->initialized_) {
539 this->enter_idle_();
543 this->enter_rx_();
544 }
545}
546
548 this->state_.MANCHESTER_EN = value ? 1 : 0;
549 if (this->initialized_) {
551 }
552}
553
555 this->state_.NUM_PREAMBLE = value;
556 if (this->initialized_) {
558 }
559}
560
561void CC1101Component::set_sync1(uint8_t value) {
562 this->state_.SYNC1 = value;
563 if (this->initialized_) {
564 this->write_(Register::SYNC1);
565 }
566}
567
568void CC1101Component::set_sync0(uint8_t value) {
569 this->state_.SYNC0 = value;
570 if (this->initialized_) {
571 this->write_(Register::SYNC0);
572 }
573}
574
576 this->state_.MAGN_TARGET = static_cast<uint8_t>(value);
577 if (this->initialized_) {
579 }
580}
581
583 this->state_.MAX_LNA_GAIN = static_cast<uint8_t>(value);
584 if (this->initialized_) {
586 }
587}
588
590 this->state_.MAX_DVGA_GAIN = static_cast<uint8_t>(value);
591 if (this->initialized_) {
593 }
594}
595
597 this->state_.CARRIER_SENSE_ABS_THR = static_cast<uint8_t>(value & 0b1111);
598 if (this->initialized_) {
600 }
601}
602
604 this->state_.CARRIER_SENSE_REL_THR = static_cast<uint8_t>(value);
605 if (this->initialized_) {
607 }
608}
609
611 this->state_.AGC_LNA_PRIORITY = value ? 1 : 0;
612 if (this->initialized_) {
614 }
615}
616
618 this->state_.FILTER_LENGTH = static_cast<uint8_t>(value);
619 if (this->initialized_) {
621 }
622}
623
625 this->state_.FILTER_LENGTH = static_cast<uint8_t>(value);
626 if (this->initialized_) {
628 }
629}
630
632 this->state_.AGC_FREEZE = static_cast<uint8_t>(value);
633 if (this->initialized_) {
635 }
636}
637
639 this->state_.WAIT_TIME = static_cast<uint8_t>(value);
640 if (this->initialized_) {
642 }
643}
644
646 this->state_.HYST_LEVEL = static_cast<uint8_t>(value);
647 if (this->initialized_) {
649 }
650}
651
653 this->state_.PKT_FORMAT =
655 if (value) {
656 // Configure GDO0 for FIFO status (asserts on RX FIFO threshold or end of packet)
657 this->state_.GDO0_CFG = 0x01;
658 // Set max RX FIFO threshold to ensure we only trigger on end-of-packet
659 this->state_.FIFO_THR = 15;
660 // Don't append status bytes to FIFO - we read from registers instead
661 this->state_.APPEND_STATUS = 0;
662 } else {
663 // Configure GDO0 for serial data (async serial mode)
664 this->state_.GDO0_CFG = 0x0D;
665 }
666 if (this->initialized_) {
671 }
672}
673
675 if (value == 0) {
676 this->state_.LENGTH_CONFIG = static_cast<uint8_t>(LengthConfig::LENGTH_CONFIG_VARIABLE);
677 } else {
678 this->state_.LENGTH_CONFIG = static_cast<uint8_t>(LengthConfig::LENGTH_CONFIG_FIXED);
679 this->state_.PKTLEN = value;
680 }
681 if (this->initialized_) {
684 }
685}
686
688 this->state_.CRC_EN = value ? 1 : 0;
689 if (this->initialized_) {
691 }
692}
693
695 this->state_.WHITE_DATA = value ? 1 : 0;
696 if (this->initialized_) {
698 }
699}
700
701} // namespace esphome::cc1101
uint8_t m
Definition bl0906.h:1
virtual void mark_failed()
Mark this component as failed.
ESPDEPRECATED("Use const char* overload instead. Removed in 2026.7.0", "2026.1.0") void defer(const std voi defer)(const char *name, std::function< void()> &&f)
Defer a callback to the next loop() call.
Definition component.h:479
virtual void pin_mode(gpio::Flags flags)=0
virtual void setup()=0
virtual void digital_write(bool value)=0
void trigger(const Ts &...x)
Inform the parent automation that the event has triggered.
Definition automation.h:279
void set_packet_mode(bool value)
Definition cc1101.cpp:652
void set_max_dvga_gain(MaxDvgaGain value)
Definition cc1101.cpp:589
void set_whitening(bool value)
Definition cc1101.cpp:694
void set_carrier_sense_above_threshold(bool value)
Definition cc1101.cpp:528
void write_(Register reg)
Definition cc1101.cpp:321
void set_sync0(uint8_t value)
Definition cc1101.cpp:568
void set_freeze(Freeze value)
Definition cc1101.cpp:631
void call_listeners_(const std::vector< uint8_t > &packet, float freq_offset, float rssi, uint8_t lqi)
Definition cc1101.cpp:155
void set_rx_attenuation(RxAttenuation value)
Definition cc1101.cpp:423
InternalGPIOPin * gdo0_pin_
Definition cc1101.h:95
void set_symbol_rate(float value)
Definition cc1101.cpp:509
uint8_t strobe_(Command cmd)
Definition cc1101.cpp:310
void set_sync_mode(SyncMode value)
Definition cc1101.cpp:521
void set_fsk_deviation(float value)
Definition cc1101.cpp:490
void set_msk_deviation(uint8_t value)
Definition cc1101.cpp:501
void set_carrier_sense_rel_thr(CarrierSenseRelThr value)
Definition cc1101.cpp:603
uint8_t pa_table_[PA_TABLE_SIZE]
Definition cc1101.h:90
void set_lna_priority(bool value)
Definition cc1101.cpp:610
void set_output_power(float value)
Definition cc1101.cpp:395
void set_modulation_type(Modulation value)
Definition cc1101.cpp:535
void set_if_frequency(float value)
Definition cc1101.cpp:451
void set_frequency(float value)
Definition cc1101.cpp:437
void set_num_preamble(uint8_t value)
Definition cc1101.cpp:554
void set_hyst_level(HystLevel value)
Definition cc1101.cpp:645
void set_filter_bandwidth(float value)
Definition cc1101.cpp:458
void set_filter_length_fsk_msk(FilterLengthFskMsk value)
Definition cc1101.cpp:617
void set_crc_enable(bool value)
Definition cc1101.cpp:687
void set_carrier_sense_abs_thr(int8_t value)
Definition cc1101.cpp:596
bool enter_calibrated_(State target_state, Command cmd)
Definition cc1101.cpp:283
void set_magn_target(MagnTarget value)
Definition cc1101.cpp:575
void set_channel_spacing(float value)
Definition cc1101.cpp:478
CC1101Error transmit_packet(const std::vector< uint8_t > &packet)
Definition cc1101.cpp:359
void set_wait_time(WaitTime value)
Definition cc1101.cpp:638
std::vector< CC1101Listener * > listeners_
Definition cc1101.h:101
void set_dc_blocking_filter(bool value)
Definition cc1101.cpp:430
void set_packet_length(uint8_t value)
Definition cc1101.cpp:674
void set_manchester(bool value)
Definition cc1101.cpp:547
std::vector< uint8_t > packet_
Definition cc1101.h:100
void set_channel(uint8_t value)
Definition cc1101.cpp:469
void set_filter_length_ask_ook(FilterLengthAskOok value)
Definition cc1101.cpp:624
void set_max_lna_gain(MaxLnaGain value)
Definition cc1101.cpp:582
void set_sync1(uint8_t value)
Definition cc1101.cpp:561
bool wait_for_state_(State target_state, uint32_t timeout_ms=100)
Definition cc1101.cpp:270
Trigger< std::vector< uint8_t >, float, float, uint8_t > packet_trigger_
Definition cc1101.h:99
@ FLAG_OUTPUT
Definition gpio.h:28
@ FLAG_INPUT
Definition gpio.h:27
void IRAM_ATTR HOT delayMicroseconds(uint32_t us)
Definition core.cpp:28
constexpr uint16_t encode_uint16(uint8_t msb, uint8_t lsb)
Encode a 16-bit value given the most and least significant byte.
Definition helpers.h:528
void IRAM_ATTR HOT delay(uint32_t ms)
Definition core.cpp:26
uint32_t IRAM_ATTR HOT millis()
Definition core.cpp:25
static uint8_t find(const PowerTableItem *items, size_t count, float &dbm_target)
Definition cc1101pa.h:15
uint16_t length
Definition tt21100.cpp:0