11 REG_ABZ_MUX_DIR, REG_RES_H, REG_ABZ_RES_L, REG_CONFIG_H, REG_ZERO_L,
12 REG_HYST_L, REG_OUT, REG_A_HIGH, REG_A_START_L, REG_A_STOP_L,
94 uint8_t masks[CONFIG_REG_COUNT] = {};
95 uint8_t values[CONFIG_REG_COUNT] = {};
96 auto add = [&masks, &values](uint8_t
reg, uint8_t mask, uint8_t value) {
97 for (uint8_t i = 0; i < CONFIG_REG_COUNT; i++) {
100 values[i] |= value & mask;
107 add(REG_ABZ_MUX_DIR, 0x02, this->
direction_ << 1);
109 add(REG_ABZ_MUX_DIR, 0x40, (this->
output_mode_ & 0x01) << 6);
115 add(REG_CONFIG_H, 0x80, (this->
hysteresis_ & 0x04) << 5);
116 add(REG_HYST_L, 0xC0, (this->
hysteresis_ & 0x03) << 6);
121 add(REG_RES_H, 0x03, res >> 8);
122 add(REG_ABZ_RES_L, 0xFF, res & 0xFF);
146 for (uint8_t i = 0; i < CONFIG_REG_COUNT; i++) {
152 this->
mark_failed(LOG_STR(
"configuration register write failed"));