ESPHome 2026.5.0-dev
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mcp2515.cpp
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1#include "mcp2515.h"
2#include "esphome/core/log.h"
3
4namespace esphome {
5namespace mcp2515 {
6
7static const char *const TAG = "mcp2515";
8
9const struct MCP2515::TxBnRegs MCP2515::TXB[N_TXBUFFERS] = {{MCP_TXB0CTRL, MCP_TXB0SIDH, MCP_TXB0DATA},
10 {MCP_TXB1CTRL, MCP_TXB1SIDH, MCP_TXB1DATA},
11 {MCP_TXB2CTRL, MCP_TXB2SIDH, MCP_TXB2DATA}};
12
13const struct MCP2515::RxBnRegs MCP2515::RXB[N_RXBUFFERS] = {{MCP_RXB0CTRL, MCP_RXB0SIDH, MCP_RXB0DATA, CANINTF_RX0IF},
14 {MCP_RXB1CTRL, MCP_RXB1SIDH, MCP_RXB1DATA, CANINTF_RX1IF}};
15
16bool MCP2515::setup_internal() {
17 this->spi_setup();
18
19 if (this->reset_() != canbus::ERROR_OK)
20 return false;
21 if (this->set_bitrate_(this->bit_rate_, this->mcp_clock_) != canbus::ERROR_OK)
22 return false;
23
24 // setup hardware filter RXF0 accepting all standard CAN IDs
25 if (this->set_filter_(RXF::RXF0, false, 0) != canbus::ERROR_OK) {
26 return false;
27 }
28 if (this->set_filter_mask_(MASK::MASK0, false, 0) != canbus::ERROR_OK) {
29 return false;
30 }
31
32 // setup hardware filter RXF1 accepting all extended CAN IDs
33 if (this->set_filter_(RXF::RXF1, true, 0) != canbus::ERROR_OK) {
34 return false;
35 }
36 if (this->set_filter_mask_(MASK::MASK1, true, 0) != canbus::ERROR_OK) {
37 return false;
38 }
39
40 if (this->set_mode_(this->mcp_mode_) != canbus::ERROR_OK)
41 return false;
42 uint8_t err_flags = this->get_error_flags_();
43 ESP_LOGD(TAG, "mcp2515 setup done, error_flags = %02X", err_flags);
44 return true;
45}
46
47canbus::Error MCP2515::reset_() {
48 this->enable();
49 this->transfer_byte(INSTRUCTION_RESET);
50 this->disable();
51 ESP_LOGV(TAG, "reset_()");
52 delay(10);
53
54 ESP_LOGV(TAG, "reset() CLEAR ALL TXB registers");
55
56 uint8_t zeros[14];
57 memset(zeros, 0, sizeof(zeros));
58 set_registers_(MCP_TXB0CTRL, zeros, 14);
59 set_registers_(MCP_TXB1CTRL, zeros, 14);
60 set_registers_(MCP_TXB2CTRL, zeros, 14);
61 ESP_LOGV(TAG, "reset() CLEARED TXB registers");
62
63 set_register_(MCP_RXB0CTRL, 0);
64 set_register_(MCP_RXB1CTRL, 0);
65
66 set_register_(MCP_CANINTE, CANINTF_RX0IF | CANINTF_RX1IF | CANINTF_ERRIF | CANINTF_MERRF);
67
68 modify_register_(MCP_RXB0CTRL, RXB_CTRL_RXM_MASK | RXB_0_CTRL_BUKT, RXB_CTRL_RXM_STDEXT | RXB_0_CTRL_BUKT);
69 modify_register_(MCP_RXB1CTRL, RXB_CTRL_RXM_MASK, RXB_CTRL_RXM_STDEXT);
70
71 return canbus::ERROR_OK;
72}
73
74uint8_t MCP2515::read_register_(const REGISTER reg) {
75 this->enable();
76 this->transfer_byte(INSTRUCTION_READ);
77 this->transfer_byte(reg);
78 uint8_t ret = this->transfer_byte(0x00);
79 this->disable();
80
81 return ret;
82}
83
84void MCP2515::read_registers_(const REGISTER reg, uint8_t values[], const uint8_t n) {
85 this->enable();
86 this->transfer_byte(INSTRUCTION_READ);
87 this->transfer_byte(reg);
88 // this->transfer_array(values, n);
89 // mcp2515 has auto - increment of address - pointer
90 for (uint8_t i = 0; i < n; i++) {
91 values[i] = this->transfer_byte(0x00);
92 }
93 this->disable();
94}
95
96void MCP2515::set_register_(const REGISTER reg, const uint8_t value) {
97 this->enable();
98 this->transfer_byte(INSTRUCTION_WRITE);
99 this->transfer_byte(reg);
100 this->transfer_byte(value);
101 this->disable();
102}
103
104void MCP2515::set_registers_(const REGISTER reg, uint8_t values[], const uint8_t n) {
105 this->enable();
106 this->transfer_byte(INSTRUCTION_WRITE);
107 this->transfer_byte(reg);
108 // this->transfer_array(values, n);
109 for (uint8_t i = 0; i < n; i++) {
110 this->transfer_byte(values[i]);
111 }
112 this->disable();
113}
114
115void MCP2515::modify_register_(const REGISTER reg, const uint8_t mask, const uint8_t data) {
116 this->enable();
117 this->transfer_byte(INSTRUCTION_BITMOD);
118 this->transfer_byte(reg);
119 this->transfer_byte(mask);
120 this->transfer_byte(data);
121 this->disable();
122}
123
124uint8_t MCP2515::get_status_() {
125 this->enable();
126 this->transfer_byte(INSTRUCTION_READ_STATUS);
127 uint8_t i = this->transfer_byte(0x00);
128 this->disable();
129
130 return i;
131}
132
133canbus::Error MCP2515::set_mode_(const CanctrlReqopMode mode) {
134 modify_register_(MCP_CANCTRL, CANCTRL_REQOP, mode);
135
136 uint32_t start_time = millis();
137 while (millis() - start_time < 10) {
138 if ((read_register_(MCP_CANSTAT) & CANSTAT_OPMOD) == mode)
139 return canbus::ERROR_OK;
140 }
141 ESP_LOGE(TAG, "Failed to set mode");
142 return canbus::ERROR_FAIL;
143}
144
145canbus::Error MCP2515::set_clk_out_(const CanClkOut divisor) {
146 if (divisor == CLKOUT_DISABLE) {
147 /* Turn off CLKEN */
148 modify_register_(MCP_CANCTRL, CANCTRL_CLKEN, 0x00);
149
150 /* Turn on CLKOUT for SOF */
151 modify_register_(MCP_CNF3, CNF3_SOF, CNF3_SOF);
152 return canbus::ERROR_OK;
153 }
154
155 /* Set the prescaler (CLKPRE) */
156 modify_register_(MCP_CANCTRL, CANCTRL_CLKPRE, divisor);
157
158 /* Turn on CLKEN */
159 modify_register_(MCP_CANCTRL, CANCTRL_CLKEN, CANCTRL_CLKEN);
160
161 /* Turn off CLKOUT for SOF */
162 modify_register_(MCP_CNF3, CNF3_SOF, 0x00);
163 return canbus::ERROR_OK;
164}
165
166void MCP2515::prepare_id_(uint8_t *buffer, const bool extended, const uint32_t id) {
167 uint16_t canid = (uint16_t) (id & 0x0FFFF);
168
169 if (extended) {
170 buffer[MCP_EID0] = (uint8_t) (canid & 0xFF);
171 buffer[MCP_EID8] = (uint8_t) (canid >> 8);
172 canid = (uint16_t) (id >> 16);
173 buffer[MCP_SIDL] = (uint8_t) (canid & 0x03);
174 buffer[MCP_SIDL] += (uint8_t) ((canid & 0x1C) << 3);
175 buffer[MCP_SIDL] |= SIDL_EXIDE_MASK;
176 buffer[MCP_SIDH] = (uint8_t) (canid >> 5);
177 } else {
178 buffer[MCP_SIDH] = (uint8_t) (canid >> 3);
179 buffer[MCP_SIDL] = (uint8_t) ((canid & 0x07) << 5);
180 buffer[MCP_EID0] = 0;
181 buffer[MCP_EID8] = 0;
182 }
183}
184
185canbus::Error MCP2515::set_filter_mask_(const MASK mask, const bool extended, const uint32_t ul_data) {
186 canbus::Error res = set_mode_(CANCTRL_REQOP_CONFIG);
187 if (res != canbus::ERROR_OK) {
188 return res;
189 }
190
191 uint8_t tbufdata[4];
192 prepare_id_(tbufdata, extended, ul_data);
193
194 REGISTER reg;
195 switch (mask) {
196 case MASK0:
197 reg = MCP_RXM0SIDH;
198 break;
199 case MASK1:
200 reg = MCP_RXM1SIDH;
201 break;
202 default:
203 return canbus::ERROR_FAIL;
204 }
205
206 set_registers_(reg, tbufdata, 4);
207
208 return canbus::ERROR_OK;
209}
210
211canbus::Error MCP2515::set_filter_(const RXF num, const bool extended, const uint32_t ul_data) {
212 canbus::Error res = set_mode_(CANCTRL_REQOP_CONFIG);
213 if (res != canbus::ERROR_OK) {
214 return res;
215 }
216
217 REGISTER reg;
218
219 switch (num) {
220 case RXF0:
221 reg = MCP_RXF0SIDH;
222 break;
223 case RXF1:
224 reg = MCP_RXF1SIDH;
225 break;
226 case RXF2:
227 reg = MCP_RXF2SIDH;
228 break;
229 case RXF3:
230 reg = MCP_RXF3SIDH;
231 break;
232 case RXF4:
233 reg = MCP_RXF4SIDH;
234 break;
235 case RXF5:
236 reg = MCP_RXF5SIDH;
237 break;
238 default:
239 return canbus::ERROR_FAIL;
240 }
241
242 uint8_t tbufdata[4];
243 prepare_id_(tbufdata, extended, ul_data);
244 set_registers_(reg, tbufdata, 4);
245
246 return canbus::ERROR_OK;
247}
248
249canbus::Error MCP2515::send_message_(TXBn txbn, struct canbus::CanFrame *frame) {
250 const struct TxBnRegs *txbuf = &TXB[txbn];
251
252 uint8_t data[13];
253
254 prepare_id_(data, frame->use_extended_id, frame->can_id);
255 data[MCP_DLC] =
256 frame->remote_transmission_request ? (frame->can_data_length_code | RTR_MASK) : frame->can_data_length_code;
257 memcpy(&data[MCP_DATA], frame->data, frame->can_data_length_code);
258 set_registers_(txbuf->SIDH, data, 5 + frame->can_data_length_code);
259 modify_register_(txbuf->CTRL, TXB_TXREQ, TXB_TXREQ);
260
261 return canbus::ERROR_OK;
262}
263
264canbus::Error MCP2515::send_message(struct canbus::CanFrame *frame) {
265 if (frame->can_data_length_code > canbus::CAN_MAX_DATA_LENGTH) {
266 return canbus::ERROR_FAILTX;
267 }
268 TXBn tx_buffers[N_TXBUFFERS] = {TXB0, TXB1, TXB2};
269
270 for (auto &tx_buffer : tx_buffers) {
271 const struct TxBnRegs *txbuf = &TXB[tx_buffer];
272 uint8_t ctrlval = read_register_(txbuf->CTRL);
273 if ((ctrlval & TXB_TXREQ) == 0) {
274 return send_message_(tx_buffer, frame);
275 }
276 }
277
278 return canbus::ERROR_ALLTXBUSY;
279}
280
281canbus::Error MCP2515::read_message_(RXBn rxbn, struct canbus::CanFrame *frame) {
282 const struct RxBnRegs *rxb = &RXB[rxbn];
283
284 uint8_t tbufdata[5];
285
286 read_registers_(rxb->SIDH, tbufdata, 5);
287
288 uint32_t id = (tbufdata[MCP_SIDH] << 3) + (tbufdata[MCP_SIDL] >> 5);
289 bool use_extended_id = false;
290 bool remote_transmission_request = false;
291
292 if ((tbufdata[MCP_SIDL] & SIDL_EXIDE_MASK) == SIDL_EXIDE_MASK) {
293 id = (id << 2) + (tbufdata[MCP_SIDL] & 0x03);
294 id = (id << 8) + tbufdata[MCP_EID8];
295 id = (id << 8) + tbufdata[MCP_EID0];
296 // id |= canbus::CAN_EFF_FLAG;
297 use_extended_id = true;
298 }
299
300 uint8_t dlc = (tbufdata[MCP_DLC] & DLC_MASK);
301 if (dlc > canbus::CAN_MAX_DATA_LENGTH) {
302 return canbus::ERROR_FAIL;
303 }
304
305 uint8_t ctrl = read_register_(rxb->CTRL);
306 if (ctrl & RXB_CTRL_RTR) {
307 // id |= canbus::CAN_RTR_FLAG;
308 remote_transmission_request = true;
309 }
310
311 frame->can_id = id;
312 frame->can_data_length_code = dlc;
313 frame->use_extended_id = use_extended_id;
314 frame->remote_transmission_request = remote_transmission_request;
315
316 read_registers_(rxb->DATA, frame->data, dlc);
317
318 modify_register_(MCP_CANINTF, rxb->CANINTF_RXnIF, 0);
319
320 return canbus::ERROR_OK;
321}
322
323canbus::Error MCP2515::read_message(struct canbus::CanFrame *frame) {
324 canbus::Error rc;
325 uint8_t stat = get_status_();
326
327 if (stat & STAT_RX0IF) {
328 rc = read_message_(RXB0, frame);
329 } else if (stat & STAT_RX1IF) {
330 rc = read_message_(RXB1, frame);
331 } else {
332 rc = canbus::ERROR_NOMSG;
333 }
334
335#ifdef ESPHOME_LOG_HAS_DEBUG
336 uint8_t err = get_error_flags_();
337 // The receive flowchart in the datasheet says that if rollover is set (BUKT), RX1OVR flag will be set
338 // once both buffers are full. However, the RX0OVR flag is actually set instead.
339 // We can just check for both though because it doesn't break anything.
340 if (err & (EFLG_RX0OVR | EFLG_RX1OVR)) {
341 ESP_LOGD(TAG, "receive buffer overrun");
342 clear_rx_n_ovr_flags_();
343 }
344#endif
345
346 return rc;
347}
348
349bool MCP2515::check_receive_() {
350 uint8_t res = get_status_();
351 return (res & STAT_RXIF_MASK) != 0;
352}
353
354bool MCP2515::check_error_() {
355 uint8_t eflg = get_error_flags_();
356 return (eflg & EFLG_ERRORMASK) != 0;
357}
358
359uint8_t MCP2515::get_error_flags_() { return read_register_(MCP_EFLG); }
360
361void MCP2515::clear_rx_n_ovr_flags_() { modify_register_(MCP_EFLG, EFLG_RX0OVR | EFLG_RX1OVR, 0); }
362
363uint8_t MCP2515::get_int_() { return read_register_(MCP_CANINTF); }
364
365void MCP2515::clear_int_() { set_register_(MCP_CANINTF, 0); }
366
367uint8_t MCP2515::get_int_mask_() { return read_register_(MCP_CANINTE); }
368
369void MCP2515::clear_tx_int_() { modify_register_(MCP_CANINTF, (CANINTF_TX0IF | CANINTF_TX1IF | CANINTF_TX2IF), 0); }
370
371void MCP2515::clear_rx_n_ovr_() {
372 uint8_t eflg = get_error_flags_();
373 if (eflg != 0) {
374 clear_rx_n_ovr_flags_();
375 clear_int_();
376 // modify_register_(MCP_CANINTF, CANINTF_ERRIF, 0);
377 }
378}
379
380void MCP2515::clear_merr_() {
381 // modify_register_(MCP_EFLG, EFLG_RX0OVR | EFLG_RX1OVR, 0);
382 // clear_int_();
383 modify_register_(MCP_CANINTF, CANINTF_MERRF, 0);
384}
385
386void MCP2515::clear_errif_() {
387 // modify_register_(MCP_EFLG, EFLG_RX0OVR | EFLG_RX1OVR, 0);
388 // clear_int_();
389 modify_register_(MCP_CANINTF, CANINTF_ERRIF, 0);
390}
391
392canbus::Error MCP2515::set_bitrate_(canbus::CanSpeed can_speed) { return this->set_bitrate_(can_speed, MCP_16MHZ); }
393
394canbus::Error MCP2515::set_bitrate_(canbus::CanSpeed can_speed, CanClock can_clock) {
395 canbus::Error error = set_mode_(CANCTRL_REQOP_CONFIG);
396 if (error != canbus::ERROR_OK) {
397 return error;
398 }
399
400 uint8_t set, cfg1, cfg2, cfg3;
401 set = 1;
402 switch (can_clock) {
403 case (MCP_8MHZ):
404 switch (can_speed) {
405 case (canbus::CAN_5KBPS): // 5KBPS
406 cfg1 = MCP_8MHZ_5KBPS_CFG1;
407 cfg2 = MCP_8MHZ_5KBPS_CFG2;
408 cfg3 = MCP_8MHZ_5KBPS_CFG3;
409 break;
410 case (canbus::CAN_10KBPS): // 10KBPS
411 cfg1 = MCP_8MHZ_10KBPS_CFG1;
412 cfg2 = MCP_8MHZ_10KBPS_CFG2;
413 cfg3 = MCP_8MHZ_10KBPS_CFG3;
414 break;
415 case (canbus::CAN_20KBPS): // 20KBPS
416 cfg1 = MCP_8MHZ_20KBPS_CFG1;
417 cfg2 = MCP_8MHZ_20KBPS_CFG2;
418 cfg3 = MCP_8MHZ_20KBPS_CFG3;
419 break;
420 case (canbus::CAN_31K25BPS): // 31.25KBPS
421 cfg1 = MCP_8MHZ_31K25BPS_CFG1;
422 cfg2 = MCP_8MHZ_31K25BPS_CFG2;
423 cfg3 = MCP_8MHZ_31K25BPS_CFG3;
424 break;
425 case (canbus::CAN_33KBPS): // 33.333KBPS
426 cfg1 = MCP_8MHZ_33K3BPS_CFG1;
427 cfg2 = MCP_8MHZ_33K3BPS_CFG2;
428 cfg3 = MCP_8MHZ_33K3BPS_CFG3;
429 break;
430 case (canbus::CAN_40KBPS): // 40Kbps
431 cfg1 = MCP_8MHZ_40KBPS_CFG1;
432 cfg2 = MCP_8MHZ_40KBPS_CFG2;
433 cfg3 = MCP_8MHZ_40KBPS_CFG3;
434 break;
435 case (canbus::CAN_50KBPS): // 50Kbps
436 cfg1 = MCP_8MHZ_50KBPS_CFG1;
437 cfg2 = MCP_8MHZ_50KBPS_CFG2;
438 cfg3 = MCP_8MHZ_50KBPS_CFG3;
439 break;
440 case (canbus::CAN_80KBPS): // 80Kbps
441 cfg1 = MCP_8MHZ_80KBPS_CFG1;
442 cfg2 = MCP_8MHZ_80KBPS_CFG2;
443 cfg3 = MCP_8MHZ_80KBPS_CFG3;
444 break;
445 case (canbus::CAN_100KBPS): // 100Kbps
446 cfg1 = MCP_8MHZ_100KBPS_CFG1;
447 cfg2 = MCP_8MHZ_100KBPS_CFG2;
448 cfg3 = MCP_8MHZ_100KBPS_CFG3;
449 break;
450 case (canbus::CAN_125KBPS): // 125Kbps
451 cfg1 = MCP_8MHZ_125KBPS_CFG1;
452 cfg2 = MCP_8MHZ_125KBPS_CFG2;
453 cfg3 = MCP_8MHZ_125KBPS_CFG3;
454 break;
455 case (canbus::CAN_200KBPS): // 200Kbps
456 cfg1 = MCP_8MHZ_200KBPS_CFG1;
457 cfg2 = MCP_8MHZ_200KBPS_CFG2;
458 cfg3 = MCP_8MHZ_200KBPS_CFG3;
459 break;
460 case (canbus::CAN_250KBPS): // 250Kbps
461 cfg1 = MCP_8MHZ_250KBPS_CFG1;
462 cfg2 = MCP_8MHZ_250KBPS_CFG2;
463 cfg3 = MCP_8MHZ_250KBPS_CFG3;
464 break;
465 case (canbus::CAN_500KBPS): // 500Kbps
466 cfg1 = MCP_8MHZ_500KBPS_CFG1;
467 cfg2 = MCP_8MHZ_500KBPS_CFG2;
468 cfg3 = MCP_8MHZ_500KBPS_CFG3;
469 break;
470 case (canbus::CAN_1000KBPS): // 1Mbps
471 cfg1 = MCP_8MHZ_1000KBPS_CFG1;
472 cfg2 = MCP_8MHZ_1000KBPS_CFG2;
473 cfg3 = MCP_8MHZ_1000KBPS_CFG3;
474 break;
475 default:
476 set = 0;
477 break;
478 }
479 break;
480
481 case (MCP_12MHZ):
482 switch (can_speed) {
483 case (canbus::CAN_5KBPS): // 5Kbps
484 cfg1 = MCP_12MHZ_5KBPS_CFG1;
485 cfg2 = MCP_12MHZ_5KBPS_CFG2;
486 cfg3 = MCP_12MHZ_5KBPS_CFG3;
487 break;
488 case (canbus::CAN_10KBPS): // 10Kbps
489 cfg1 = MCP_12MHZ_10KBPS_CFG1;
490 cfg2 = MCP_12MHZ_10KBPS_CFG2;
491 cfg3 = MCP_12MHZ_10KBPS_CFG3;
492 break;
493 case (canbus::CAN_20KBPS): // 20Kbps
494 cfg1 = MCP_12MHZ_20KBPS_CFG1;
495 cfg2 = MCP_12MHZ_20KBPS_CFG2;
496 cfg3 = MCP_12MHZ_20KBPS_CFG3;
497 break;
498 case (canbus::CAN_33KBPS): // 33.333Kbps
499 cfg1 = MCP_12MHZ_33K3BPS_CFG1;
500 cfg2 = MCP_12MHZ_33K3BPS_CFG2;
501 cfg3 = MCP_12MHZ_33K3BPS_CFG3;
502 break;
503 case (canbus::CAN_40KBPS): // 40Kbps
504 cfg1 = MCP_12MHZ_40KBPS_CFG1;
505 cfg2 = MCP_12MHZ_40KBPS_CFG2;
506 cfg3 = MCP_12MHZ_40KBPS_CFG3;
507 break;
508 case (canbus::CAN_50KBPS): // 50Kbps
509 cfg1 = MCP_12MHZ_50KBPS_CFG1;
510 cfg2 = MCP_12MHZ_50KBPS_CFG2;
511 cfg3 = MCP_12MHZ_50KBPS_CFG3;
512 break;
513 case (canbus::CAN_80KBPS): // 80Kbps
514 cfg1 = MCP_12MHZ_80KBPS_CFG1;
515 cfg2 = MCP_12MHZ_80KBPS_CFG2;
516 cfg3 = MCP_12MHZ_80KBPS_CFG3;
517 break;
518 case (canbus::CAN_100KBPS): // 100Kbps
519 cfg1 = MCP_12MHZ_100KBPS_CFG1;
520 cfg2 = MCP_12MHZ_100KBPS_CFG2;
521 cfg3 = MCP_12MHZ_100KBPS_CFG3;
522 break;
523 case (canbus::CAN_125KBPS): // 125Kbps
524 cfg1 = MCP_12MHZ_125KBPS_CFG1;
525 cfg2 = MCP_12MHZ_125KBPS_CFG2;
526 cfg3 = MCP_12MHZ_125KBPS_CFG3;
527 break;
528 case (canbus::CAN_200KBPS): // 200Kbps
529 cfg1 = MCP_12MHZ_200KBPS_CFG1;
530 cfg2 = MCP_12MHZ_200KBPS_CFG2;
531 cfg3 = MCP_12MHZ_200KBPS_CFG3;
532 break;
533 case (canbus::CAN_250KBPS): // 250Kbps
534 cfg1 = MCP_12MHZ_250KBPS_CFG1;
535 cfg2 = MCP_12MHZ_250KBPS_CFG2;
536 cfg3 = MCP_12MHZ_250KBPS_CFG3;
537 break;
538 case (canbus::CAN_500KBPS): // 500Kbps
539 cfg1 = MCP_12MHZ_500KBPS_CFG1;
540 cfg2 = MCP_12MHZ_500KBPS_CFG2;
541 cfg3 = MCP_12MHZ_500KBPS_CFG3;
542 break;
543 case (canbus::CAN_1000KBPS): // 1Mbps
544 cfg1 = MCP_12MHZ_1000KBPS_CFG1;
545 cfg2 = MCP_12MHZ_1000KBPS_CFG2;
546 cfg3 = MCP_12MHZ_1000KBPS_CFG3;
547 break;
548 default:
549 set = 0;
550 break;
551 }
552 break;
553
554 case (MCP_16MHZ):
555 switch (can_speed) {
556 case (canbus::CAN_5KBPS): // 5Kbps
557 cfg1 = MCP_16MHZ_5KBPS_CFG1;
558 cfg2 = MCP_16MHZ_5KBPS_CFG2;
559 cfg3 = MCP_16MHZ_5KBPS_CFG3;
560 break;
561 case (canbus::CAN_10KBPS): // 10Kbps
562 cfg1 = MCP_16MHZ_10KBPS_CFG1;
563 cfg2 = MCP_16MHZ_10KBPS_CFG2;
564 cfg3 = MCP_16MHZ_10KBPS_CFG3;
565 break;
566 case (canbus::CAN_20KBPS): // 20Kbps
567 cfg1 = MCP_16MHZ_20KBPS_CFG1;
568 cfg2 = MCP_16MHZ_20KBPS_CFG2;
569 cfg3 = MCP_16MHZ_20KBPS_CFG3;
570 break;
571 case (canbus::CAN_33KBPS): // 33.333Kbps
572 cfg1 = MCP_16MHZ_33K3BPS_CFG1;
573 cfg2 = MCP_16MHZ_33K3BPS_CFG2;
574 cfg3 = MCP_16MHZ_33K3BPS_CFG3;
575 break;
576 case (canbus::CAN_40KBPS): // 40Kbps
577 cfg1 = MCP_16MHZ_40KBPS_CFG1;
578 cfg2 = MCP_16MHZ_40KBPS_CFG2;
579 cfg3 = MCP_16MHZ_40KBPS_CFG3;
580 break;
581 case (canbus::CAN_50KBPS): // 50Kbps
582 cfg1 = MCP_16MHZ_50KBPS_CFG1;
583 cfg2 = MCP_16MHZ_50KBPS_CFG2;
584 cfg3 = MCP_16MHZ_50KBPS_CFG3;
585 break;
586 case (canbus::CAN_80KBPS): // 80Kbps
587 cfg1 = MCP_16MHZ_80KBPS_CFG1;
588 cfg2 = MCP_16MHZ_80KBPS_CFG2;
589 cfg3 = MCP_16MHZ_80KBPS_CFG3;
590 break;
591 case (canbus::CAN_83K3BPS): // 83.333Kbps
592 cfg1 = MCP_16MHZ_83K3BPS_CFG1;
593 cfg2 = MCP_16MHZ_83K3BPS_CFG2;
594 cfg3 = MCP_16MHZ_83K3BPS_CFG3;
595 break;
596 case (canbus::CAN_100KBPS): // 100Kbps
597 cfg1 = MCP_16MHZ_100KBPS_CFG1;
598 cfg2 = MCP_16MHZ_100KBPS_CFG2;
599 cfg3 = MCP_16MHZ_100KBPS_CFG3;
600 break;
601 case (canbus::CAN_125KBPS): // 125Kbps
602 cfg1 = MCP_16MHZ_125KBPS_CFG1;
603 cfg2 = MCP_16MHZ_125KBPS_CFG2;
604 cfg3 = MCP_16MHZ_125KBPS_CFG3;
605 break;
606 case (canbus::CAN_200KBPS): // 200Kbps
607 cfg1 = MCP_16MHZ_200KBPS_CFG1;
608 cfg2 = MCP_16MHZ_200KBPS_CFG2;
609 cfg3 = MCP_16MHZ_200KBPS_CFG3;
610 break;
611 case (canbus::CAN_250KBPS): // 250Kbps
612 cfg1 = MCP_16MHZ_250KBPS_CFG1;
613 cfg2 = MCP_16MHZ_250KBPS_CFG2;
614 cfg3 = MCP_16MHZ_250KBPS_CFG3;
615 break;
616 case (canbus::CAN_500KBPS): // 500Kbps
617 cfg1 = MCP_16MHZ_500KBPS_CFG1;
618 cfg2 = MCP_16MHZ_500KBPS_CFG2;
619 cfg3 = MCP_16MHZ_500KBPS_CFG3;
620 break;
621 case (canbus::CAN_1000KBPS): // 1Mbps
622 cfg1 = MCP_16MHZ_1000KBPS_CFG1;
623 cfg2 = MCP_16MHZ_1000KBPS_CFG2;
624 cfg3 = MCP_16MHZ_1000KBPS_CFG3;
625 break;
626 default:
627 set = 0;
628 break;
629 }
630 break;
631
632 case (MCP_20MHZ):
633 switch (can_speed) {
634 case (canbus::CAN_33KBPS): // 33.333Kbps
635 cfg1 = MCP_20MHZ_33K3BPS_CFG1;
636 cfg2 = MCP_20MHZ_33K3BPS_CFG2;
637 cfg3 = MCP_20MHZ_33K3BPS_CFG3;
638 break;
639 case (canbus::CAN_40KBPS): // 40Kbps
640 cfg1 = MCP_20MHZ_40KBPS_CFG1;
641 cfg2 = MCP_20MHZ_40KBPS_CFG2;
642 cfg3 = MCP_20MHZ_40KBPS_CFG3;
643 break;
644 case (canbus::CAN_50KBPS): // 50Kbps
645 cfg1 = MCP_20MHZ_50KBPS_CFG1;
646 cfg2 = MCP_20MHZ_50KBPS_CFG2;
647 cfg3 = MCP_20MHZ_50KBPS_CFG3;
648 break;
649 case (canbus::CAN_80KBPS): // 80Kbps
650 cfg1 = MCP_20MHZ_80KBPS_CFG1;
651 cfg2 = MCP_20MHZ_80KBPS_CFG2;
652 cfg3 = MCP_20MHZ_80KBPS_CFG3;
653 break;
654 case (canbus::CAN_83K3BPS): // 83.333Kbps
655 cfg1 = MCP_20MHZ_83K3BPS_CFG1;
656 cfg2 = MCP_20MHZ_83K3BPS_CFG2;
657 cfg3 = MCP_20MHZ_83K3BPS_CFG3;
658 break;
659 case (canbus::CAN_100KBPS): // 100Kbps
660 cfg1 = MCP_20MHZ_100KBPS_CFG1;
661 cfg2 = MCP_20MHZ_100KBPS_CFG2;
662 cfg3 = MCP_20MHZ_100KBPS_CFG3;
663 break;
664 case (canbus::CAN_125KBPS): // 125Kbps
665 cfg1 = MCP_20MHZ_125KBPS_CFG1;
666 cfg2 = MCP_20MHZ_125KBPS_CFG2;
667 cfg3 = MCP_20MHZ_125KBPS_CFG3;
668 break;
669 case (canbus::CAN_200KBPS): // 200Kbps
670 cfg1 = MCP_20MHZ_200KBPS_CFG1;
671 cfg2 = MCP_20MHZ_200KBPS_CFG2;
672 cfg3 = MCP_20MHZ_200KBPS_CFG3;
673 break;
674 case (canbus::CAN_250KBPS): // 250Kbps
675 cfg1 = MCP_20MHZ_250KBPS_CFG1;
676 cfg2 = MCP_20MHZ_250KBPS_CFG2;
677 cfg3 = MCP_20MHZ_250KBPS_CFG3;
678 break;
679 case (canbus::CAN_500KBPS): // 500Kbps
680 cfg1 = MCP_20MHZ_500KBPS_CFG1;
681 cfg2 = MCP_20MHZ_500KBPS_CFG2;
682 cfg3 = MCP_20MHZ_500KBPS_CFG3;
683 break;
684 case (canbus::CAN_1000KBPS): // 1Mbps
685 cfg1 = MCP_20MHZ_1000KBPS_CFG1;
686 cfg2 = MCP_20MHZ_1000KBPS_CFG2;
687 cfg3 = MCP_20MHZ_1000KBPS_CFG3;
688 break;
689 default:
690 set = 0;
691 break;
692 }
693 break;
694
695 default:
696 set = 0;
697 break;
698 }
699
700 if (set) {
701 set_register_(MCP_CNF1, cfg1); // NOLINT
702 set_register_(MCP_CNF2, cfg2); // NOLINT
703 set_register_(MCP_CNF3, cfg3); // NOLINT
704 return canbus::ERROR_OK;
705 } else {
706 ESP_LOGE(TAG, "Invalid frequency/bitrate combination: %d/%d", can_clock, can_speed);
707 return canbus::ERROR_FAIL;
708 }
709}
710} // namespace mcp2515
711} // namespace esphome
mode
BedjetMode mode
BedJet operating mode.
Definition bedjet_codec.h:19
esphome::mcp2515::MCP2515::reset_
canbus::Error reset_()
Definition mcp2515.cpp:47
esphome::mcp2515::MCP2515::RXB
static const struct esphome::mcp2515::MCP2515::RxBnRegs RXB[N_RXBUFFERS]
Definition mcp2515.cpp:13
esphome::mcp2515::MCP2515::modify_register_
void modify_register_(REGISTER reg, uint8_t mask, uint8_t data)
Definition mcp2515.cpp:115
esphome::mcp2515::MCP2515::set_filter_mask_
canbus::Error set_filter_mask_(MASK mask, bool extended, uint32_t ul_data)
Definition mcp2515.cpp:185
esphome::mcp2515::MCP2515::prepare_id_
void prepare_id_(uint8_t *buffer, bool extended, uint32_t id)
Definition mcp2515.cpp:166
esphome::mcp2515::MCP2515::read_registers_
void read_registers_(REGISTER reg, uint8_t values[], uint8_t n)
Definition mcp2515.cpp:84
esphome::mcp2515::MCP2515::read_register_
uint8_t read_register_(REGISTER reg)
Definition mcp2515.cpp:74
esphome::mcp2515::MCP2515::set_registers_
void set_registers_(REGISTER reg, uint8_t values[], uint8_t n)
Definition mcp2515.cpp:104
esphome::mcp2515::MCP2515::mcp_mode_
CanctrlReqopMode mcp_mode_
Definition mcp2515.h:77
esphome::mcp2515::MCP2515::TXB
static const struct esphome::mcp2515::MCP2515::TxBnRegs TXB[N_TXBUFFERS]
Definition mcp2515.cpp:9
esphome::mcp2515::MCP2515::send_message
canbus::Error send_message(struct canbus::CanFrame *frame) override
Definition mcp2515.cpp:264
esphome::mcp2515::MCP2515::setup_internal
bool setup_internal() override
Definition mcp2515.cpp:16
esphome::mcp2515::MCP2515::set_register_
void set_register_(REGISTER reg, uint8_t value)
Definition mcp2515.cpp:96
esphome::mcp2515::MCP2515::set_filter_
canbus::Error set_filter_(RXF num, bool extended, uint32_t ul_data)
Definition mcp2515.cpp:211
esphome::mcp2515::MCP2515::set_mode_
canbus::Error set_mode_(CanctrlReqopMode mode)
Definition mcp2515.cpp:133
esphome::mcp2515::MCP2515::send_message_
canbus::Error send_message_(TXBn txbn, struct canbus::CanFrame *frame)
Definition mcp2515.cpp:249
esphome::mcp2515::MCP2515::read_message
canbus::Error read_message(struct canbus::CanFrame *frame) override
Definition mcp2515.cpp:323
esphome::mcp2515::MCP2515::set_clk_out_
canbus::Error set_clk_out_(CanClkOut divisor)
Definition mcp2515.cpp:145
esphome::mcp2515::MCP2515::read_message_
canbus::Error read_message_(RXBn rxbn, struct canbus::CanFrame *frame)
Definition mcp2515.cpp:281
esphome::mcp2515::MCP2515::set_bitrate_
canbus::Error set_bitrate_(canbus::CanSpeed can_speed)
Definition mcp2515.cpp:392
id
uint16_t id
Definition dns_server_esp32_idf.cpp:0
esphome
Providing packet encoding functions for exchanging data with a remote host.
Definition a01nyub.cpp:7
esphome::delay
void HOT delay(uint32_t ms)
Definition core.cpp:28
esphome::millis
uint32_t IRAM_ATTR HOT millis()
Definition core.cpp:26
uint32_t
static void uint32_t
Definition crash_handler.cpp:141
esphome::canbus::CanFrame::can_data_length_code
uint8_t can_data_length_code
Definition canbus.h:61
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