ESPHome 2025.9.0-dev
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stm32flash.cpp
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1/*
2 stm32flash - Open Source ST STM32 flash program for Arduino
3 Copyright 2010 Geoffrey McRae <[email protected]>
4 Copyright 2012-2014 Tormod Volden <[email protected]>
5
6 This program is free software; you can redistribute it and/or
7 modify it under the terms of the GNU General Public License
8 as published by the Free Software Foundation; either version 2
9 of the License, or (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
19*/
20
22#ifdef USE_SHD_FIRMWARE_DATA
23
24#include <cstdint>
25
26#include "stm32flash.h"
27#include "debug.h"
28
29#include "dev_table.h"
30#include "esphome/core/log.h"
31
32#include <algorithm>
33#include <memory>
34
35namespace {
36
37constexpr uint8_t STM32_ACK = 0x79;
38constexpr uint8_t STM32_NACK = 0x1F;
39constexpr uint8_t STM32_BUSY = 0x76;
40
41constexpr uint8_t STM32_CMD_INIT = 0x7F;
42constexpr uint8_t STM32_CMD_GET = 0x00; /* get the version and command supported */
43constexpr uint8_t STM32_CMD_GVR = 0x01; /* get version and read protection status */
44constexpr uint8_t STM32_CMD_GID = 0x02; /* get ID */
45constexpr uint8_t STM32_CMD_RM = 0x11; /* read memory */
46constexpr uint8_t STM32_CMD_GO = 0x21; /* go */
47constexpr uint8_t STM32_CMD_WM = 0x31; /* write memory */
48constexpr uint8_t STM32_CMD_WM_NS = 0x32; /* no-stretch write memory */
49constexpr uint8_t STM32_CMD_ER = 0x43; /* erase */
50constexpr uint8_t STM32_CMD_EE = 0x44; /* extended erase */
51constexpr uint8_t STM32_CMD_EE_NS = 0x45; /* extended erase no-stretch */
52constexpr uint8_t STM32_CMD_WP = 0x63; /* write protect */
53constexpr uint8_t STM32_CMD_WP_NS = 0x64; /* write protect no-stretch */
54constexpr uint8_t STM32_CMD_UW = 0x73; /* write unprotect */
55constexpr uint8_t STM32_CMD_UW_NS = 0x74; /* write unprotect no-stretch */
56constexpr uint8_t STM32_CMD_RP = 0x82; /* readout protect */
57constexpr uint8_t STM32_CMD_RP_NS = 0x83; /* readout protect no-stretch */
58constexpr uint8_t STM32_CMD_UR = 0x92; /* readout unprotect */
59constexpr uint8_t STM32_CMD_UR_NS = 0x93; /* readout unprotect no-stretch */
60constexpr uint8_t STM32_CMD_CRC = 0xA1; /* compute CRC */
61constexpr uint8_t STM32_CMD_ERR = 0xFF; /* not a valid command */
62
63constexpr uint32_t STM32_RESYNC_TIMEOUT = 35 * 1000; /* milliseconds */
64constexpr uint32_t STM32_MASSERASE_TIMEOUT = 35 * 1000; /* milliseconds */
65constexpr uint32_t STM32_PAGEERASE_TIMEOUT = 5 * 1000; /* milliseconds */
66constexpr uint32_t STM32_BLKWRITE_TIMEOUT = 1 * 1000; /* milliseconds */
67constexpr uint32_t STM32_WUNPROT_TIMEOUT = 1 * 1000; /* milliseconds */
68constexpr uint32_t STM32_WPROT_TIMEOUT = 1 * 1000; /* milliseconds */
69constexpr uint32_t STM32_RPROT_TIMEOUT = 1 * 1000; /* milliseconds */
70constexpr uint32_t DEFAULT_TIMEOUT = 5 * 1000; /* milliseconds */
71
72constexpr uint8_t STM32_CMD_GET_LENGTH = 17; /* bytes in the reply */
73
74/* Reset code for ARMv7-M (Cortex-M3) and ARMv6-M (Cortex-M0)
75 * see ARMv7-M or ARMv6-M Architecture Reference Manual (table B3-8)
76 * or "The definitive guide to the ARM Cortex-M3", section 14.4.
77 */
78constexpr uint8_t STM_RESET_CODE[] = {
79 0x01, 0x49, // ldr r1, [pc, #4] ; (<AIRCR_OFFSET>)
80 0x02, 0x4A, // ldr r2, [pc, #8] ; (<AIRCR_RESET_VALUE>)
81 0x0A, 0x60, // str r2, [r1, #0]
82 0xfe, 0xe7, // endless: b endless
83 0x0c, 0xed, 0x00, 0xe0, // .word 0xe000ed0c <AIRCR_OFFSET> = NVIC AIRCR register address
84 0x04, 0x00, 0xfa, 0x05 // .word 0x05fa0004 <AIRCR_RESET_VALUE> = VECTKEY | SYSRESETREQ
85};
86
87constexpr uint32_t STM_RESET_CODE_SIZE = sizeof(STM_RESET_CODE);
88
89/* RM0360, Empty check
90 * On STM32F070x6 and STM32F030xC devices only, internal empty check flag is
91 * implemented to allow easy programming of the virgin devices by the boot loader. This flag is
92 * used when BOOT0 pin is defining Main Flash memory as the target boot space. When the
93 * flag is set, the device is considered as empty and System memory (boot loader) is selected
94 * instead of the Main Flash as a boot space to allow user to program the Flash memory.
95 * This flag is updated only during Option bytes loading: it is set when the content of the
96 * address 0x08000 0000 is read as 0xFFFF FFFF, otherwise it is cleared. It means a power
97 * on or setting of OBL_LAUNCH bit in FLASH_CR register is needed to clear this flag after
98 * programming of a virgin device to execute user code after System reset.
99 */
100constexpr uint8_t STM_OBL_LAUNCH_CODE[] = {
101 0x01, 0x49, // ldr r1, [pc, #4] ; (<FLASH_CR>)
102 0x02, 0x4A, // ldr r2, [pc, #8] ; (<OBL_LAUNCH>)
103 0x0A, 0x60, // str r2, [r1, #0]
104 0xfe, 0xe7, // endless: b endless
105 0x10, 0x20, 0x02, 0x40, // address: FLASH_CR = 40022010
106 0x00, 0x20, 0x00, 0x00 // value: OBL_LAUNCH = 00002000
107};
108
109constexpr uint32_t STM_OBL_LAUNCH_CODE_SIZE = sizeof(STM_OBL_LAUNCH_CODE);
110
111constexpr char TAG[] = "stm32flash";
112
113} // Anonymous namespace
114
115namespace esphome {
116namespace shelly_dimmer {
117
118namespace {
119
120int flash_addr_to_page_ceil(const stm32_unique_ptr &stm, uint32_t addr) {
121 if (!(addr >= stm->dev->fl_start && addr <= stm->dev->fl_end))
122 return 0;
123
124 int page = 0;
125 addr -= stm->dev->fl_start;
126 const auto *psize = stm->dev->fl_ps;
127
128 while (addr >= psize[0]) {
129 addr -= psize[0];
130 page++;
131 if (psize[1])
132 psize++;
133 }
134
135 return addr ? page + 1 : page;
136}
137
138stm32_err_t stm32_get_ack_timeout(const stm32_unique_ptr &stm, uint32_t timeout) {
139 auto *stream = stm->stream;
140 uint8_t rxbyte;
141
142 if (!(stm->flags & STREAM_OPT_RETRY))
143 timeout = 0;
144
145 if (timeout == 0)
146 timeout = DEFAULT_TIMEOUT;
147
148 const uint32_t start_time = millis();
149 do {
150 yield();
151 if (!stream->available()) {
152 if (millis() < start_time + timeout)
153 continue;
154 ESP_LOGD(TAG, "Failed to read ACK timeout=%i", timeout);
155 return STM32_ERR_UNKNOWN;
156 }
157
158 stream->read_byte(&rxbyte);
159
160 if (rxbyte == STM32_ACK)
161 return STM32_ERR_OK;
162 if (rxbyte == STM32_NACK)
163 return STM32_ERR_NACK;
164 if (rxbyte != STM32_BUSY) {
165 ESP_LOGD(TAG, "Got byte 0x%02x instead of ACK", rxbyte);
166 return STM32_ERR_UNKNOWN;
167 }
168 } while (true);
169}
170
171stm32_err_t stm32_get_ack(const stm32_unique_ptr &stm) { return stm32_get_ack_timeout(stm, 0); }
172
173stm32_err_t stm32_send_command_timeout(const stm32_unique_ptr &stm, const uint8_t cmd, const uint32_t timeout) {
174 auto *const stream = stm->stream;
175
176 static constexpr auto BUFFER_SIZE = 2;
177 const uint8_t buf[] = {
178 cmd,
179 static_cast<uint8_t>(cmd ^ 0xFF),
180 };
181 static_assert(sizeof(buf) == BUFFER_SIZE, "Buf expected to be 2 bytes");
182
183 stream->write_array(buf, BUFFER_SIZE);
184 stream->flush();
185
186 stm32_err_t s_err = stm32_get_ack_timeout(stm, timeout);
187 if (s_err == STM32_ERR_OK)
188 return STM32_ERR_OK;
189 if (s_err == STM32_ERR_NACK) {
190 ESP_LOGD(TAG, "Got NACK from device on command 0x%02x", cmd);
191 } else {
192 ESP_LOGD(TAG, "Unexpected reply from device on command 0x%02x", cmd);
193 }
194 return STM32_ERR_UNKNOWN;
195}
196
197stm32_err_t stm32_send_command(const stm32_unique_ptr &stm, const uint8_t cmd) {
198 return stm32_send_command_timeout(stm, cmd, 0);
199}
200
201/* if we have lost sync, send a wrong command and expect a NACK */
202stm32_err_t stm32_resync(const stm32_unique_ptr &stm) {
203 auto *const stream = stm->stream;
204 uint32_t t0 = millis();
205 auto t1 = t0;
206
207 static constexpr auto BUFFER_SIZE = 2;
208 const uint8_t buf[] = {
209 STM32_CMD_ERR,
210 static_cast<uint8_t>(STM32_CMD_ERR ^ 0xFF),
211 };
212 static_assert(sizeof(buf) == BUFFER_SIZE, "Buf expected to be 2 bytes");
213
214 uint8_t ack;
215 while (t1 < t0 + STM32_RESYNC_TIMEOUT) {
216 stream->write_array(buf, BUFFER_SIZE);
217 stream->flush();
218 if (!stream->read_array(&ack, 1)) {
219 t1 = millis();
220 continue;
221 }
222 if (ack == STM32_NACK)
223 return STM32_ERR_OK;
224 t1 = millis();
225 }
226 return STM32_ERR_UNKNOWN;
227}
228
229/*
230 * some command receive reply frame with variable length, and length is
231 * embedded in reply frame itself.
232 * We can guess the length, but if we guess wrong the protocol gets out
233 * of sync.
234 * Use resync for frame oriented interfaces (e.g. I2C) and byte-by-byte
235 * read for byte oriented interfaces (e.g. UART).
236 *
237 * to run safely, data buffer should be allocated for 256+1 bytes
238 *
239 * len is value of the first byte in the frame.
240 */
241stm32_err_t stm32_guess_len_cmd(const stm32_unique_ptr &stm, const uint8_t cmd, uint8_t *const data, unsigned int len) {
242 auto *const stream = stm->stream;
243
244 if (stm32_send_command(stm, cmd) != STM32_ERR_OK)
245 return STM32_ERR_UNKNOWN;
246 if (stm->flags & STREAM_OPT_BYTE) {
247 /* interface is UART-like */
248 if (!stream->read_array(data, 1))
249 return STM32_ERR_UNKNOWN;
250 len = data[0];
251 if (!stream->read_array(data + 1, len + 1))
252 return STM32_ERR_UNKNOWN;
253 return STM32_ERR_OK;
254 }
255
256 const auto ret = stream->read_array(data, len + 2);
257 if (ret && len == data[0])
258 return STM32_ERR_OK;
259 if (!ret) {
260 /* restart with only one byte */
261 if (stm32_resync(stm) != STM32_ERR_OK)
262 return STM32_ERR_UNKNOWN;
263 if (stm32_send_command(stm, cmd) != STM32_ERR_OK)
264 return STM32_ERR_UNKNOWN;
265 if (!stream->read_array(data, 1))
266 return STM32_ERR_UNKNOWN;
267 }
268
269 ESP_LOGD(TAG, "Re sync (len = %d)", data[0]);
270 if (stm32_resync(stm) != STM32_ERR_OK)
271 return STM32_ERR_UNKNOWN;
272
273 len = data[0];
274 if (stm32_send_command(stm, cmd) != STM32_ERR_OK)
275 return STM32_ERR_UNKNOWN;
276
277 if (!stream->read_array(data, len + 2))
278 return STM32_ERR_UNKNOWN;
279 return STM32_ERR_OK;
280}
281
282/*
283 * Some interface, e.g. UART, requires a specific init sequence to let STM32
284 * autodetect the interface speed.
285 * The sequence is only required one time after reset.
286 * This function sends the init sequence and, in case of timeout, recovers
287 * the interface.
288 */
289stm32_err_t stm32_send_init_seq(const stm32_unique_ptr &stm) {
290 auto *const stream = stm->stream;
291
292 stream->write_array(&STM32_CMD_INIT, 1);
293 stream->flush();
294
295 uint8_t byte;
296 bool ret = stream->read_array(&byte, 1);
297 if (ret && byte == STM32_ACK)
298 return STM32_ERR_OK;
299 if (ret && byte == STM32_NACK) {
300 /* We could get error later, but let's continue, for now. */
301 ESP_LOGD(TAG, "Warning: the interface was not closed properly.");
302 return STM32_ERR_OK;
303 }
304 if (!ret) {
305 ESP_LOGD(TAG, "Failed to init device.");
306 return STM32_ERR_UNKNOWN;
307 }
308
309 /*
310 * Check if previous STM32_CMD_INIT was taken as first byte
311 * of a command. Send a new byte, we should get back a NACK.
312 */
313 stream->write_array(&STM32_CMD_INIT, 1);
314 stream->flush();
315
316 ret = stream->read_array(&byte, 1);
317 if (ret && byte == STM32_NACK)
318 return STM32_ERR_OK;
319 ESP_LOGD(TAG, "Failed to init device.");
320 return STM32_ERR_UNKNOWN;
321}
322
323stm32_err_t stm32_mass_erase(const stm32_unique_ptr &stm) {
324 auto *const stream = stm->stream;
325
326 if (stm32_send_command(stm, stm->cmd->er) != STM32_ERR_OK) {
327 ESP_LOGD(TAG, "Can't initiate chip mass erase!");
328 return STM32_ERR_UNKNOWN;
329 }
330
331 /* regular erase (0x43) */
332 if (stm->cmd->er == STM32_CMD_ER) {
333 const auto s_err = stm32_send_command_timeout(stm, 0xFF, STM32_MASSERASE_TIMEOUT);
334 if (s_err != STM32_ERR_OK) {
335 return STM32_ERR_UNKNOWN;
336 }
337 return STM32_ERR_OK;
338 }
339
340 /* extended erase */
341 static constexpr auto BUFFER_SIZE = 3;
342 const uint8_t buf[] = {
343 0xFF, /* 0xFFFF the magic number for mass erase */
344 0xFF, 0x00, /* checksum */
345 };
346 static_assert(sizeof(buf) == BUFFER_SIZE, "Expected the buffer to be 3 bytes");
347 stream->write_array(buf, 3);
348 stream->flush();
349
350 const auto s_err = stm32_get_ack_timeout(stm, STM32_MASSERASE_TIMEOUT);
351 if (s_err != STM32_ERR_OK) {
352 ESP_LOGD(TAG, "Mass erase failed. Try specifying the number of pages to be erased.");
353 return STM32_ERR_UNKNOWN;
354 }
355 return STM32_ERR_OK;
356}
357
358template<typename T> std::unique_ptr<T[], void (*)(T *memory)> malloc_array_raii(size_t size) {
359 // Could be constexpr in c++17
360 static const auto DELETOR = [](T *memory) {
361 free(memory); // NOLINT
362 };
363 return std::unique_ptr<T[], decltype(DELETOR)>{static_cast<T *>(malloc(size)), // NOLINT
364 DELETOR};
365}
366
367stm32_err_t stm32_pages_erase(const stm32_unique_ptr &stm, const uint32_t spage, const uint32_t pages) {
368 auto *const stream = stm->stream;
369 uint8_t cs = 0;
370 int i = 0;
371
372 /* The erase command reported by the bootloader is either 0x43, 0x44 or 0x45 */
373 /* 0x44 is Extended Erase, a 2 byte based protocol and needs to be handled differently. */
374 /* 0x45 is clock no-stretching version of Extended Erase for I2C port. */
375 if (stm32_send_command(stm, stm->cmd->er) != STM32_ERR_OK) {
376 ESP_LOGD(TAG, "Can't initiate chip mass erase!");
377 return STM32_ERR_UNKNOWN;
378 }
379
380 /* regular erase (0x43) */
381 if (stm->cmd->er == STM32_CMD_ER) {
382 // Free memory with RAII
383 auto buf = malloc_array_raii<uint8_t>(1 + pages + 1);
384
385 if (!buf)
386 return STM32_ERR_UNKNOWN;
387
388 buf[i++] = pages - 1;
389 cs ^= (pages - 1);
390 for (auto pg_num = spage; pg_num < (pages + spage); pg_num++) {
391 buf[i++] = pg_num;
392 cs ^= pg_num;
393 }
394 buf[i++] = cs;
395 stream->write_array(&buf[0], i);
396 stream->flush();
397
398 const auto s_err = stm32_get_ack_timeout(stm, pages * STM32_PAGEERASE_TIMEOUT);
399 if (s_err != STM32_ERR_OK) {
400 return STM32_ERR_UNKNOWN;
401 }
402 return STM32_ERR_OK;
403 }
404
405 /* extended erase */
406
407 // Free memory with RAII
408 auto buf = malloc_array_raii<uint8_t>(2 + 2 * pages + 1);
409
410 if (!buf)
411 return STM32_ERR_UNKNOWN;
412
413 /* Number of pages to be erased - 1, two bytes, MSB first */
414 uint8_t pg_byte = (pages - 1) >> 8;
415 buf[i++] = pg_byte;
416 cs ^= pg_byte;
417 pg_byte = (pages - 1) & 0xFF;
418 buf[i++] = pg_byte;
419 cs ^= pg_byte;
420
421 for (auto pg_num = spage; pg_num < spage + pages; pg_num++) {
422 pg_byte = pg_num >> 8;
423 cs ^= pg_byte;
424 buf[i++] = pg_byte;
425 pg_byte = pg_num & 0xFF;
426 cs ^= pg_byte;
427 buf[i++] = pg_byte;
428 }
429 buf[i++] = cs;
430 stream->write_array(&buf[0], i);
431 stream->flush();
432
433 const auto s_err = stm32_get_ack_timeout(stm, pages * STM32_PAGEERASE_TIMEOUT);
434 if (s_err != STM32_ERR_OK) {
435 ESP_LOGD(TAG, "Page-by-page erase failed. Check the maximum pages your device supports.");
436 return STM32_ERR_UNKNOWN;
437 }
438
439 return STM32_ERR_OK;
440}
441
442template<typename T> stm32_err_t stm32_check_ack_timeout(const stm32_err_t s_err, const T &&log) {
443 switch (s_err) {
444 case STM32_ERR_OK:
445 return STM32_ERR_OK;
446 case STM32_ERR_NACK:
447 log();
448 [[fallthrough]];
449 default:
450 return STM32_ERR_UNKNOWN;
451 }
452}
453
454/* detect CPU endian */
455bool cpu_le() {
456 static constexpr int N = 1;
457
458 // returns true if little endian
459 return *reinterpret_cast<const char *>(&N) == 1;
460}
461
462uint32_t le_u32(const uint32_t v) {
463 if (!cpu_le())
464 return ((v & 0xFF000000) >> 24) | ((v & 0x00FF0000) >> 8) | ((v & 0x0000FF00) << 8) | ((v & 0x000000FF) << 24);
465 return v;
466}
467
468template<size_t N> void populate_buffer_with_address(uint8_t (&buffer)[N], uint32_t address) {
469 buffer[0] = static_cast<uint8_t>(address >> 24);
470 buffer[1] = static_cast<uint8_t>((address >> 16) & 0xFF);
471 buffer[2] = static_cast<uint8_t>((address >> 8) & 0xFF);
472 buffer[3] = static_cast<uint8_t>(address & 0xFF);
473 buffer[4] = static_cast<uint8_t>(buffer[0] ^ buffer[1] ^ buffer[2] ^ buffer[3]);
474}
475
476template<typename T> stm32_unique_ptr make_stm32_with_deletor(T ptr) {
477 static const auto CLOSE = [](stm32_t *stm32) {
478 if (stm32) {
479 free(stm32->cmd); // NOLINT
480 }
481 free(stm32); // NOLINT
482 };
483
484 // Cleanup with RAII
485 return std::unique_ptr<stm32_t, decltype(CLOSE)>{ptr, CLOSE};
486}
487
488} // Anonymous namespace
489
490} // namespace shelly_dimmer
491} // namespace esphome
492
493namespace esphome {
494namespace shelly_dimmer {
495
496/* find newer command by higher code */
497#define newer(prev, a) (((prev) == STM32_CMD_ERR) ? (a) : (((prev) > (a)) ? (prev) : (a)))
498
499stm32_unique_ptr stm32_init(uart::UARTDevice *stream, const uint8_t flags, const char init) {
500 uint8_t buf[257];
501
502 auto stm = make_stm32_with_deletor(static_cast<stm32_t *>(calloc(sizeof(stm32_t), 1))); // NOLINT
503
504 if (!stm) {
505 return make_stm32_with_deletor(nullptr);
506 }
507 stm->stream = stream;
508 stm->flags = flags;
509
510 stm->cmd = static_cast<stm32_cmd_t *>(malloc(sizeof(stm32_cmd_t))); // NOLINT
511 if (!stm->cmd) {
512 return make_stm32_with_deletor(nullptr);
513 }
514 memset(stm->cmd, STM32_CMD_ERR, sizeof(stm32_cmd_t));
515
516 if ((stm->flags & STREAM_OPT_CMD_INIT) && init) {
517 if (stm32_send_init_seq(stm) != STM32_ERR_OK)
518 return make_stm32_with_deletor(nullptr);
519 }
520
521 /* get the version and read protection status */
522 if (stm32_send_command(stm, STM32_CMD_GVR) != STM32_ERR_OK) {
523 return make_stm32_with_deletor(nullptr);
524 }
525
526 /* From AN, only UART bootloader returns 3 bytes */
527 {
528 const auto len = (stm->flags & STREAM_OPT_GVR_ETX) ? 3 : 1;
529 if (!stream->read_array(buf, len))
530 return make_stm32_with_deletor(nullptr);
531
532 stm->version = buf[0];
533 stm->option1 = (stm->flags & STREAM_OPT_GVR_ETX) ? buf[1] : 0;
534 stm->option2 = (stm->flags & STREAM_OPT_GVR_ETX) ? buf[2] : 0;
535 if (stm32_get_ack(stm) != STM32_ERR_OK) {
536 return make_stm32_with_deletor(nullptr);
537 }
538 }
539
540 {
541 const auto len = ([&]() {
542 /* get the bootloader information */
543 if (stm->cmd_get_reply) {
544 for (auto i = 0; stm->cmd_get_reply[i].length; ++i) {
545 if (stm->version == stm->cmd_get_reply[i].version) {
546 return stm->cmd_get_reply[i].length;
547 }
548 }
549 }
550
551 return STM32_CMD_GET_LENGTH;
552 })();
553
554 if (stm32_guess_len_cmd(stm, STM32_CMD_GET, buf, len) != STM32_ERR_OK)
555 return make_stm32_with_deletor(nullptr);
556 }
557
558 const auto stop = buf[0] + 1;
559 stm->bl_version = buf[1];
560 int new_cmds = 0;
561 for (auto i = 1; i < stop; ++i) {
562 const auto val = buf[i + 1];
563 switch (val) {
564 case STM32_CMD_GET:
565 stm->cmd->get = val;
566 break;
567 case STM32_CMD_GVR:
568 stm->cmd->gvr = val;
569 break;
570 case STM32_CMD_GID:
571 stm->cmd->gid = val;
572 break;
573 case STM32_CMD_RM:
574 stm->cmd->rm = val;
575 break;
576 case STM32_CMD_GO:
577 stm->cmd->go = val;
578 break;
579 case STM32_CMD_WM:
580 case STM32_CMD_WM_NS:
581 stm->cmd->wm = newer(stm->cmd->wm, val);
582 break;
583 case STM32_CMD_ER:
584 case STM32_CMD_EE:
585 case STM32_CMD_EE_NS:
586 stm->cmd->er = newer(stm->cmd->er, val);
587 break;
588 case STM32_CMD_WP:
589 case STM32_CMD_WP_NS:
590 stm->cmd->wp = newer(stm->cmd->wp, val);
591 break;
592 case STM32_CMD_UW:
593 case STM32_CMD_UW_NS:
594 stm->cmd->uw = newer(stm->cmd->uw, val);
595 break;
596 case STM32_CMD_RP:
597 case STM32_CMD_RP_NS:
598 stm->cmd->rp = newer(stm->cmd->rp, val);
599 break;
600 case STM32_CMD_UR:
601 case STM32_CMD_UR_NS:
602 stm->cmd->ur = newer(stm->cmd->ur, val);
603 break;
604 case STM32_CMD_CRC:
605 stm->cmd->crc = newer(stm->cmd->crc, val);
606 break;
607 default:
608 if (new_cmds++ == 0) {
609 ESP_LOGD(TAG, "GET returns unknown commands (0x%2x", val);
610 } else {
611 ESP_LOGD(TAG, ", 0x%2x", val);
612 }
613 }
614 }
615 if (new_cmds) {
616 ESP_LOGD(TAG, ")");
617 }
618 if (stm32_get_ack(stm) != STM32_ERR_OK) {
619 return make_stm32_with_deletor(nullptr);
620 }
621
622 if (stm->cmd->get == STM32_CMD_ERR || stm->cmd->gvr == STM32_CMD_ERR || stm->cmd->gid == STM32_CMD_ERR) {
623 ESP_LOGD(TAG, "Error: bootloader did not returned correct information from GET command");
624 return make_stm32_with_deletor(nullptr);
625 }
626
627 /* get the device ID */
628 if (stm32_guess_len_cmd(stm, stm->cmd->gid, buf, 1) != STM32_ERR_OK) {
629 return make_stm32_with_deletor(nullptr);
630 }
631 const auto returned = buf[0] + 1;
632 if (returned < 2) {
633 ESP_LOGD(TAG, "Only %d bytes sent in the PID, unknown/unsupported device", returned);
634 return make_stm32_with_deletor(nullptr);
635 }
636 stm->pid = (buf[1] << 8) | buf[2];
637 if (returned > 2) {
638 ESP_LOGD(TAG, "This bootloader returns %d extra bytes in PID:", returned);
639 for (auto i = 2; i <= returned; i++)
640 ESP_LOGD(TAG, " %02x", buf[i]);
641 }
642 if (stm32_get_ack(stm) != STM32_ERR_OK) {
643 return make_stm32_with_deletor(nullptr);
644 }
645
646 stm->dev = DEVICES;
647 while (stm->dev->id != 0x00 && stm->dev->id != stm->pid)
648 ++stm->dev;
649
650 if (!stm->dev->id) {
651 ESP_LOGD(TAG, "Unknown/unsupported device (Device ID: 0x%03x)", stm->pid);
652 return make_stm32_with_deletor(nullptr);
653 }
654
655 return stm;
656}
657
658stm32_err_t stm32_read_memory(const stm32_unique_ptr &stm, const uint32_t address, uint8_t *data,
659 const unsigned int len) {
660 auto *const stream = stm->stream;
661
662 if (!len)
663 return STM32_ERR_OK;
664
665 if (len > 256) {
666 ESP_LOGD(TAG, "Error: READ length limit at 256 bytes");
667 return STM32_ERR_UNKNOWN;
668 }
669
670 if (stm->cmd->rm == STM32_CMD_ERR) {
671 ESP_LOGD(TAG, "Error: READ command not implemented in bootloader.");
672 return STM32_ERR_NO_CMD;
673 }
674
675 if (stm32_send_command(stm, stm->cmd->rm) != STM32_ERR_OK)
676 return STM32_ERR_UNKNOWN;
677
678 static constexpr auto BUFFER_SIZE = 5;
679 uint8_t buf[BUFFER_SIZE];
680 populate_buffer_with_address(buf, address);
681
682 stream->write_array(buf, BUFFER_SIZE);
683 stream->flush();
684
685 if (stm32_get_ack(stm) != STM32_ERR_OK)
686 return STM32_ERR_UNKNOWN;
687
688 if (stm32_send_command(stm, len - 1) != STM32_ERR_OK)
689 return STM32_ERR_UNKNOWN;
690
691 if (!stream->read_array(data, len))
692 return STM32_ERR_UNKNOWN;
693
694 return STM32_ERR_OK;
695}
696
697stm32_err_t stm32_write_memory(const stm32_unique_ptr &stm, uint32_t address, const uint8_t *data,
698 const unsigned int len) {
699 auto *const stream = stm->stream;
700
701 if (!len)
702 return STM32_ERR_OK;
703
704 if (len > 256) {
705 ESP_LOGD(TAG, "Error: READ length limit at 256 bytes");
706 return STM32_ERR_UNKNOWN;
707 }
708
709 /* must be 32bit aligned */
710 if (address & 0x3) {
711 ESP_LOGD(TAG, "Error: WRITE address must be 4 byte aligned");
712 return STM32_ERR_UNKNOWN;
713 }
714
715 if (stm->cmd->wm == STM32_CMD_ERR) {
716 ESP_LOGD(TAG, "Error: WRITE command not implemented in bootloader.");
717 return STM32_ERR_NO_CMD;
718 }
719
720 /* send the address and checksum */
721 if (stm32_send_command(stm, stm->cmd->wm) != STM32_ERR_OK)
722 return STM32_ERR_UNKNOWN;
723
724 static constexpr auto BUFFER_SIZE = 5;
725 uint8_t buf1[BUFFER_SIZE];
726 populate_buffer_with_address(buf1, address);
727
728 stream->write_array(buf1, BUFFER_SIZE);
729 stream->flush();
730 if (stm32_get_ack(stm) != STM32_ERR_OK)
731 return STM32_ERR_UNKNOWN;
732
733 const unsigned int aligned_len = (len + 3) & ~3;
734 uint8_t cs = aligned_len - 1;
735 uint8_t buf[256 + 2];
736
737 buf[0] = aligned_len - 1;
738 for (auto i = 0; i < len; i++) {
739 cs ^= data[i];
740 buf[i + 1] = data[i];
741 }
742 /* padding data */
743 for (auto i = len; i < aligned_len; i++) {
744 cs ^= 0xFF;
745 buf[i + 1] = 0xFF;
746 }
747 buf[aligned_len + 1] = cs;
748 stream->write_array(buf, aligned_len + 2);
749 stream->flush();
750
751 const auto s_err = stm32_get_ack_timeout(stm, STM32_BLKWRITE_TIMEOUT);
752 if (s_err != STM32_ERR_OK) {
753 return STM32_ERR_UNKNOWN;
754 }
755 return STM32_ERR_OK;
756}
757
759 if (stm->cmd->uw == STM32_CMD_ERR) {
760 ESP_LOGD(TAG, "Error: WRITE UNPROTECT command not implemented in bootloader.");
761 return STM32_ERR_NO_CMD;
762 }
763
764 if (stm32_send_command(stm, stm->cmd->uw) != STM32_ERR_OK)
765 return STM32_ERR_UNKNOWN;
766
767 return stm32_check_ack_timeout(stm32_get_ack_timeout(stm, STM32_WUNPROT_TIMEOUT),
768 []() { ESP_LOGD(TAG, "Error: Failed to WRITE UNPROTECT"); });
769}
770
772 if (stm->cmd->wp == STM32_CMD_ERR) {
773 ESP_LOGD(TAG, "Error: WRITE PROTECT command not implemented in bootloader.");
774 return STM32_ERR_NO_CMD;
775 }
776
777 if (stm32_send_command(stm, stm->cmd->wp) != STM32_ERR_OK)
778 return STM32_ERR_UNKNOWN;
779
780 return stm32_check_ack_timeout(stm32_get_ack_timeout(stm, STM32_WPROT_TIMEOUT),
781 []() { ESP_LOGD(TAG, "Error: Failed to WRITE PROTECT"); });
782}
783
785 if (stm->cmd->ur == STM32_CMD_ERR) {
786 ESP_LOGD(TAG, "Error: READOUT UNPROTECT command not implemented in bootloader.");
787 return STM32_ERR_NO_CMD;
788 }
789
790 if (stm32_send_command(stm, stm->cmd->ur) != STM32_ERR_OK)
791 return STM32_ERR_UNKNOWN;
792
793 return stm32_check_ack_timeout(stm32_get_ack_timeout(stm, STM32_MASSERASE_TIMEOUT),
794 []() { ESP_LOGD(TAG, "Error: Failed to READOUT UNPROTECT"); });
795}
796
798 if (stm->cmd->rp == STM32_CMD_ERR) {
799 ESP_LOGD(TAG, "Error: READOUT PROTECT command not implemented in bootloader.");
800 return STM32_ERR_NO_CMD;
801 }
802
803 if (stm32_send_command(stm, stm->cmd->rp) != STM32_ERR_OK)
804 return STM32_ERR_UNKNOWN;
805
806 return stm32_check_ack_timeout(stm32_get_ack_timeout(stm, STM32_RPROT_TIMEOUT),
807 []() { ESP_LOGD(TAG, "Error: Failed to READOUT PROTECT"); });
808}
809
810stm32_err_t stm32_erase_memory(const stm32_unique_ptr &stm, uint32_t spage, uint32_t pages) {
811 if (!pages || spage > STM32_MAX_PAGES || ((pages != STM32_MASS_ERASE) && ((spage + pages) > STM32_MAX_PAGES)))
812 return STM32_ERR_OK;
813
814 if (stm->cmd->er == STM32_CMD_ERR) {
815 ESP_LOGD(TAG, "Error: ERASE command not implemented in bootloader.");
816 return STM32_ERR_NO_CMD;
817 }
818
819 if (pages == STM32_MASS_ERASE) {
820 /*
821 * Not all chips support mass erase.
822 * Mass erase can be obtained executing a "readout protect"
823 * followed by "readout un-protect". This method is not
824 * suggested because can hang the target if a debug SWD/JTAG
825 * is connected. When the target enters in "readout
826 * protection" mode it will consider the debug connection as
827 * a tentative of intrusion and will hang.
828 * Erasing the flash page-by-page is the safer way to go.
829 */
830 if (!(stm->dev->flags & F_NO_ME))
831 return stm32_mass_erase(stm);
832
833 pages = flash_addr_to_page_ceil(stm, stm->dev->fl_end);
834 }
835
836 /*
837 * Some device, like STM32L152, cannot erase more than 512 pages in
838 * one command. Split the call.
839 */
840 static constexpr uint32_t MAX_PAGE_SIZE = 512;
841 while (pages) {
842 const auto n = std::min(pages, MAX_PAGE_SIZE);
843 const auto s_err = stm32_pages_erase(stm, spage, n);
844 if (s_err != STM32_ERR_OK)
845 return s_err;
846 spage += n;
847 pages -= n;
848 }
849 return STM32_ERR_OK;
850}
851
852static stm32_err_t stm32_run_raw_code(const stm32_unique_ptr &stm, uint32_t target_address, const uint8_t *code,
853 uint32_t code_size) {
854 static constexpr uint32_t BUFFER_SIZE = 256;
855
856 const auto stack_le = le_u32(0x20002000);
857 const auto code_address_le = le_u32(target_address + 8 + 1); // thumb mode address (!)
858 uint32_t length = code_size + 8;
859
860 /* Must be 32-bit aligned */
861 if (target_address & 0x3) {
862 ESP_LOGD(TAG, "Error: code address must be 4 byte aligned");
863 return STM32_ERR_UNKNOWN;
864 }
865
866 // Could be constexpr in c++17
867 static const auto DELETOR = [](uint8_t *memory) {
868 free(memory); // NOLINT
869 };
870
871 // Free memory with RAII
872 std::unique_ptr<uint8_t, decltype(DELETOR)> mem{static_cast<uint8_t *>(malloc(length)), // NOLINT
873 DELETOR};
874
875 if (!mem)
876 return STM32_ERR_UNKNOWN;
877
878 memcpy(mem.get(), &stack_le, sizeof(stack_le));
879 memcpy(mem.get() + 4, &code_address_le, sizeof(code_address_le));
880 memcpy(mem.get() + 8, code, code_size);
881
882 auto *pos = mem.get();
883 auto address = target_address;
884 while (length > 0) {
885 const auto w = std::min(length, BUFFER_SIZE);
886 if (stm32_write_memory(stm, address, pos, w) != STM32_ERR_OK) {
887 return STM32_ERR_UNKNOWN;
888 }
889
890 address += w;
891 pos += w;
892 length -= w;
893 }
894
895 return stm32_go(stm, target_address);
896}
897
898stm32_err_t stm32_go(const stm32_unique_ptr &stm, const uint32_t address) {
899 auto *const stream = stm->stream;
900
901 if (stm->cmd->go == STM32_CMD_ERR) {
902 ESP_LOGD(TAG, "Error: GO command not implemented in bootloader.");
903 return STM32_ERR_NO_CMD;
904 }
905
906 if (stm32_send_command(stm, stm->cmd->go) != STM32_ERR_OK)
907 return STM32_ERR_UNKNOWN;
908
909 static constexpr auto BUFFER_SIZE = 5;
910 uint8_t buf[BUFFER_SIZE];
911 populate_buffer_with_address(buf, address);
912
913 stream->write_array(buf, BUFFER_SIZE);
914 stream->flush();
915
916 if (stm32_get_ack(stm) != STM32_ERR_OK)
917 return STM32_ERR_UNKNOWN;
918 return STM32_ERR_OK;
919}
920
922 const auto target_address = stm->dev->ram_start;
923
924 if (stm->dev->flags & F_OBLL) {
925 /* set the OBL_LAUNCH bit to reset device (see RM0360, 2.5) */
926 return stm32_run_raw_code(stm, target_address, STM_OBL_LAUNCH_CODE, STM_OBL_LAUNCH_CODE_SIZE);
927 } else {
928 return stm32_run_raw_code(stm, target_address, STM_RESET_CODE, STM_RESET_CODE_SIZE);
929 }
930}
931
932stm32_err_t stm32_crc_memory(const stm32_unique_ptr &stm, const uint32_t address, const uint32_t length,
933 uint32_t *const crc) {
934 static constexpr auto BUFFER_SIZE = 5;
935 auto *const stream = stm->stream;
936
937 if (address & 0x3 || length & 0x3) {
938 ESP_LOGD(TAG, "Start and end addresses must be 4 byte aligned");
939 return STM32_ERR_UNKNOWN;
940 }
941
942 if (stm->cmd->crc == STM32_CMD_ERR) {
943 ESP_LOGD(TAG, "Error: CRC command not implemented in bootloader.");
944 return STM32_ERR_NO_CMD;
945 }
946
947 if (stm32_send_command(stm, stm->cmd->crc) != STM32_ERR_OK)
948 return STM32_ERR_UNKNOWN;
949
950 {
951 static constexpr auto BUFFER_SIZE = 5;
952 uint8_t buf[BUFFER_SIZE];
953 populate_buffer_with_address(buf, address);
954
955 stream->write_array(buf, BUFFER_SIZE);
956 stream->flush();
957 }
958
959 if (stm32_get_ack(stm) != STM32_ERR_OK)
960 return STM32_ERR_UNKNOWN;
961
962 {
963 static constexpr auto BUFFER_SIZE = 5;
964 uint8_t buf[BUFFER_SIZE];
965 populate_buffer_with_address(buf, address);
966
967 stream->write_array(buf, BUFFER_SIZE);
968 stream->flush();
969 }
970
971 if (stm32_get_ack(stm) != STM32_ERR_OK)
972 return STM32_ERR_UNKNOWN;
973
974 if (stm32_get_ack(stm) != STM32_ERR_OK)
975 return STM32_ERR_UNKNOWN;
976
977 {
978 uint8_t buf[BUFFER_SIZE];
979 if (!stream->read_array(buf, BUFFER_SIZE))
980 return STM32_ERR_UNKNOWN;
981
982 if (buf[4] != (buf[0] ^ buf[1] ^ buf[2] ^ buf[3]))
983 return STM32_ERR_UNKNOWN;
984
985 *crc = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
986 }
987
988 return STM32_ERR_OK;
989}
990
991/*
992 * CRC computed by STM32 is similar to the standard crc32_be()
993 * implemented, for example, in Linux kernel in ./lib/crc32.c
994 * But STM32 computes it on units of 32 bits word and swaps the
995 * bytes of the word before the computation.
996 * Due to byte swap, I cannot use any CRC available in existing
997 * libraries, so here is a simple not optimized implementation.
998 */
999uint32_t stm32_sw_crc(uint32_t crc, uint8_t *buf, unsigned int len) {
1000 static constexpr uint32_t CRCPOLY_BE = 0x04c11db7;
1001 static constexpr uint32_t CRC_MSBMASK = 0x80000000;
1002
1003 if (len & 0x3) {
1004 ESP_LOGD(TAG, "Buffer length must be multiple of 4 bytes");
1005 return 0;
1006 }
1007
1008 while (len) {
1009 uint32_t data = *buf++;
1010 data |= *buf++ << 8;
1011 data |= *buf++ << 16;
1012 data |= *buf++ << 24;
1013 len -= 4;
1014
1015 crc ^= data;
1016
1017 for (size_t i = 0; i < 32; ++i) {
1018 if (crc & CRC_MSBMASK) {
1019 crc = (crc << 1) ^ CRCPOLY_BE;
1020 } else {
1021 crc = (crc << 1);
1022 }
1023 }
1024 }
1025 return crc;
1026}
1027
1028stm32_err_t stm32_crc_wrapper(const stm32_unique_ptr &stm, uint32_t address, uint32_t length, uint32_t *crc) {
1029 static constexpr uint32_t CRC_INIT_VALUE = 0xFFFFFFFF;
1030 static constexpr uint32_t BUFFER_SIZE = 256;
1031
1032 uint8_t buf[BUFFER_SIZE];
1033
1034 if (address & 0x3 || length & 0x3) {
1035 ESP_LOGD(TAG, "Start and end addresses must be 4 byte aligned");
1036 return STM32_ERR_UNKNOWN;
1037 }
1038
1039 if (stm->cmd->crc != STM32_CMD_ERR)
1040 return stm32_crc_memory(stm, address, length, crc);
1041
1042 const auto start = address;
1043 const auto total_len = length;
1044 uint32_t current_crc = CRC_INIT_VALUE;
1045 while (length) {
1046 const auto len = std::min(BUFFER_SIZE, length);
1047 if (stm32_read_memory(stm, address, buf, len) != STM32_ERR_OK) {
1048 ESP_LOGD(TAG, "Failed to read memory at address 0x%08x, target write-protected?", address);
1049 return STM32_ERR_UNKNOWN;
1050 }
1051 current_crc = stm32_sw_crc(current_crc, buf, len);
1052 length -= len;
1053 address += len;
1054
1055 ESP_LOGD(TAG, "\rCRC address 0x%08x (%.2f%%) ", address, (100.0f / (float) total_len) * (float) (address - start));
1056 }
1057 ESP_LOGD(TAG, "Done.");
1058 *crc = current_crc;
1059 return STM32_ERR_OK;
1060}
1061
1062} // namespace shelly_dimmer
1063} // namespace esphome
1064
1065#endif // USE_SHD_FIRMWARE_DATA
uint8_t address
Definition bl0906.h:4
bool read_array(uint8_t *data, size_t len)
Definition uart.h:32
mopeka_std_values val[4]
stm32_err_t stm32_wunprot_memory(const stm32_unique_ptr &stm)
stm32_err_t stm32_reset_device(const stm32_unique_ptr &stm)
stm32_unique_ptr stm32_init(uart::UARTDevice *stream, const uint8_t flags, const char init)
constexpr auto STREAM_OPT_CMD_INIT
Definition stm32flash.h:35
constexpr auto STREAM_OPT_RETRY
Definition stm32flash.h:36
struct Stm32 { uart::UARTDevice *stream; uint8_t flags; struct VarlenCmd *cmd_get_reply; uint8_t bl_version; uint8_t version; uint8_t option1, option2; uint16_t pid; stm32_cmd_t *cmd; const stm32_dev_t *dev;} stm32_t
Definition stm32flash.h:88
stm32_err_t stm32_readprot_memory(const stm32_unique_ptr &stm)
stm32_err_t stm32_crc_wrapper(const stm32_unique_ptr &stm, uint32_t address, uint32_t length, uint32_t *crc)
struct Stm32Cmd { uint8_t get; uint8_t gvr; uint8_t gid; uint8_t rm; uint8_t go; uint8_t wm; uint8_t er; uint8_t wp; uint8_t uw; uint8_t rp; uint8_t ur; uint8_t crc;} stm32_cmd_t
Definition stm32flash.h:61
stm32_err_t stm32_write_memory(const stm32_unique_ptr &stm, uint32_t address, const uint8_t *data, const unsigned int len)
constexpr stm32_dev_t DEVICES[]
Definition dev_table.h:62
constexpr auto STM32_MASS_ERASE
Definition stm32flash.h:47
constexpr auto STM32_MAX_PAGES
Definition stm32flash.h:46
stm32_err_t stm32_runprot_memory(const stm32_unique_ptr &stm)
stm32_err_t stm32_go(const stm32_unique_ptr &stm, const uint32_t address)
stm32_err_t stm32_crc_memory(const stm32_unique_ptr &stm, const uint32_t address, const uint32_t length, uint32_t *const crc)
stm32_err_t stm32_read_memory(const stm32_unique_ptr &stm, const uint32_t address, uint8_t *data, const unsigned int len)
uint32_t stm32_sw_crc(uint32_t crc, uint8_t *buf, unsigned int len)
constexpr auto STREAM_OPT_BYTE
Definition stm32flash.h:33
constexpr auto STREAM_OPT_GVR_ETX
Definition stm32flash.h:34
stm32_err_t stm32_erase_memory(const stm32_unique_ptr &stm, uint32_t spage, uint32_t pages)
std::unique_ptr< stm32_t, void(*)(stm32_t *)> stm32_unique_ptr
Definition stm32flash.h:112
enum Stm32Err { STM32_ERR_OK=0, STM32_ERR_UNKNOWN, STM32_ERR_NACK, STM32_ERR_NO_CMD, } stm32_err_t
Definition stm32flash.h:49
stm32_err_t stm32_wprot_memory(const stm32_unique_ptr &stm)
const char *const TAG
Definition spi.cpp:8
Providing packet encoding functions for exchanging data with a remote host.
Definition a01nyub.cpp:7
std::string size_t len
Definition helpers.h:279
void IRAM_ATTR HOT yield()
Definition core.cpp:27
uint32_t IRAM_ATTR HOT millis()
Definition core.cpp:28
void init()
Definition core.cpp:93
uint8_t ack
uint16_t length
Definition tt21100.cpp:0